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@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture
README.md

Welcome to the RISC-V Non-ISA Specifications 👋

RISC-V Logo

Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.5k 242

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 734 165

  3. riscv-arch-test riscv-arch-test Public

    Assembly 533 214

  4. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 371 94

  5. rvv-intrinsic-doc rvv-intrinsic-doc Public

    C 305 90

  6. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 168 49

Repositories

Showing 10 of 35 repositories
  • riscv-ras-eri Public

    The (RAS Error-record Register Interface) RERI provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting and logging of errors by means of a memory-mapped register interface to enable error detection, provide the facility to log the detected errors (including their severity, nature, and location), and confi…

    riscv-non-isa/riscv-ras-eri’s past year of commit activity
    TeX 9 CC-BY-4.0 5 0 0 Updated Jan 25, 2025
  • riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    riscv-non-isa/riscv-sbi-doc’s past year of commit activity
    Makefile 371 CC-BY-4.0 94 14 5 Updated Jan 24, 2025
  • riscv-security-model Public

    RISC-V Security Model

    riscv-non-isa/riscv-security-model’s past year of commit activity
    Makefile 29 CC-BY-4.0 15 4 1 Updated Jan 23, 2025
  • riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    riscv-non-isa/riscv-elf-psabi-doc’s past year of commit activity
    Python 734 CC-BY-4.0 165 56 27 Updated Jan 23, 2025
  • riscv-toolchain-conventions Public

    Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains

    riscv-non-isa/riscv-toolchain-conventions’s past year of commit activity
    Makefile 147 CC-BY-4.0 39 15 9 Updated Jan 21, 2025
  • riscv-semihosting Public
    riscv-non-isa/riscv-semihosting’s past year of commit activity
    Makefile 28 CC-BY-SA-4.0 9 1 0 Updated Jan 21, 2025
  • server-soc Public

    The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstream this repo will be used to release specifications for public review.

    riscv-non-isa/server-soc’s past year of commit activity
    TeX 22 CC-BY-4.0 8 2 0 Updated Jan 20, 2025
  • riscv-arch-test Public
    riscv-non-isa/riscv-arch-test’s past year of commit activity
    Assembly 533 Apache-2.0 214 48 38 Updated Jan 20, 2025
  • riscv-server-platform Public

    The RISC-V Server Platform specification defines a standardized set of hardware and sofware capabilities, that portable system software, such as operating systems and hypervisors, can rely on being present in a RISC-V server platform.

    riscv-non-isa/riscv-server-platform’s past year of commit activity
    Makefile 10 CC-BY-4.0 5 9 3 Updated Jan 20, 2025
  • riscv-external-debug-security Public

    The RISC-V External Debug Security Specification

    riscv-non-isa/riscv-external-debug-security’s past year of commit activity
    Makefile 19 CC-BY-4.0 4 0 0 Updated Jan 20, 2025
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