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- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Sirius_bringup
Publictacit_decoder
PublicBaremetal-IDE
PublicA submodule of Chipyard https://github.com/ucb-bar/chipyardsp24-Baremetal-IDE
PublicA submodule of Chipyard https://github.com/ucb-bar/chipyardIsaacLab
Publictestchipip
PublicSuperNoVA
Publicradiance
PublicBaremetal-NN
PublicMaDa
Publiczephyr
Publicsaturn-vectors
Publicchipyard-cs152-sp24
Publicpyuartsi
Publicgemmini-rocc-tests
Publicra-isam2
Publicspike-devices
Publicriscv-tools-feedstock
Publickicad-parts
Publicriscv-gnu-toolchain
Publiciris-event-utils
Publicconstellation
PublicG1-Demos
PublicAuRORA
Public