build: io: add multibit/bus variants of SDR and DDR

[maass-hamburg]

add bus variants of SDR and DDR, which
support more than one pin.

[enjoy-digital]

Thanks @maass-hamburg for the different PRs! Would you mind explaining the use-cases in the PR to be able to review the PR having the use-cases in mind?

[maass-hamburg]

@enjoy-digital
for example in the sdr phy in litespi this:

            for i in range(len(pads.dq)):
                self.specials += SDRTristate(
                    io = pads.dq[i],
                    o  = dq_o[i],
                    oe = dq_oe[i],
                    i  = dq_i[i],
                )

could be replaced with:

            self.specials += SDRTristateBus(
                    io = pads.dq,
                    o  = dq_o,
                    oe = dq_oe,
                    i  = dq_i,
                )