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Verilog: fix for synthesis of continuous assignments #779

Merged
merged 1 commit into from
Oct 18, 2024
Merged

Verilog: fix for synthesis of continuous assignments #779

merged 1 commit into from
Oct 18, 2024

Commits on Oct 18, 2024

  1. Verilog: fix for synthesis of continuous assignments 

    The LHS expression of continuous assignments needs to be synthesized.
    @kroening
    kroening committed Oct 18, 2024
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