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RISC-V small fix: Disable traps by clearing XIE CSR #7078

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RISC-V small fix: Disable traps by clearing XIE CSR #7078

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4 changes: 2 additions & 2 deletions core/arch/riscv/kernel/thread_optee_abi_rv.S
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Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,8 @@ FUNC thread_std_abi_entry , :
/* Save return value */
mv s0, a0

/* Disable all interrupts */
csrc CSR_XSTATUS, CSR_XSTATUS_IE
/* Mask all maskable exceptions before switching to temporary stack */
csrw CSR_XIE, x0

/* Switch to temporary stack */
jal thread_get_tmp_sp
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