soc: xlnx: zynq7000: add FPU support

[mausys]

According to its datasheet the Zynq 7000 has a VFPv3U FPU

[mausys]

datasheet:
https://docs.amd.com/v/u/en-US/ds190-Zynq-7000-Overview

[mausys]

i checked the FPU on the HW with this function:

static void fpu_info(void)
{
      int val_fpsid = 0;
      int val_mvfr0 = 0;
      int val_mvfr1 = 0;

      __asm__ ("vmrs  %[output], FPSID"  : [output] "=r" (val_fpsid));
      __asm__ ("vmrs  %[output], MVFR0"  : [output] "=r" (val_mvfr0));
      __asm__ ("vmrs  %[output], MVFR1"  : [output] "=r" (val_mvfr1));

      LOG_INF("fpsid=0x%x mvfr0=0x%x mvfr1=0x%x\n", val_fpsid, val_mvfr0, val_mvfr1);
}

output:
fpsid=0x41033094 mvfr0=0x10110222 mvfr1=0x1111111

So according to the reference manual (https://developer.arm.com/documentation/ddi0487/latest/) fp16 hw conversion is supported, but not the floating point exception trapping. But does it matter? VFP_FEATURE_TRAP isn't used anywhere.

[mausys]

I removed the half-precision support. According to MVFR1 register only conversion and not arithmetic is supported and I'm not sure if for the gcc -mfpu=vfpv3-fp16 flag both must be supported.