stm32 QSPI flash driver enables XiP on external NOR flash #68607

FRASTM · 2024-02-06T09:52:59Z

With this PR the stm32l496 and stm32h750 target board with quad-NOR flash can configure this external flash to eXecute In Place a sample code application stored on this external memory.
The qspi flash driver is configuring the external NOR in MemoryMapped mode at init so that code is XiP at the external NOR flash address.
This is demonstrated by the samples/application_development/code_relocation_nocopy/ running on the stm32h750b or stm32l496 disco kits.

This PR completes the #68597

FRASTM · 2024-02-06T09:59:57Z

Running the sample to relocate code on the external NOR flash of the stm32h750b_dk disco kit (also valid with stm32l496g_disco) :
west build -p always -b stm32h750b_dk samples/application_development/code_relocation_nocopy/
gives

*** Booting Zephyr OS build zephyr-v3.5.0-5287-g8635e7efae61 ***
Address of main function 0x800066d
Address of function_in_ext_flash 0x90000001
Address of var_ext_sram_data 0x240000e0 (10)
Address of function_in_sram 0x24000001
Address of var_sram_data 0x240000e4 (10)
Hello World! stm32h750b_dk

TODO : fix ***** USAGE FAULT ***** after cold reset on the stm32h750b_dk disco kit

FRASTM · 2024-02-06T16:55:33Z

stm32h750 disco kit the QSPI driver in memorymap does not read the same data in the external flash memory.
--> correct Just after flashing and warm reset

0x90000000 <function_in_ext_flash>:	0x49074a06	0xb5084807	0xf812f000	0x48074906
0x90000010 <function_in_ext_flash+16>:	0xe8bd680a	0xf0004008	0xbf00b80b	0x90000001
0x90000020 <function_in_ext_flash+32>:	0x080096a6	0x0800966e	0x240000e0	0x08009680

but wrong after cold reset (power off/on)

0x90000000 <function_in_ext_flash>:	0x48074906	0xf008b507	0x4912f800	0x68074806
0x90000010 <function_in_ext_flash+16>:	0x40bde80a	0xb800f008	0x0000bf0b	0x96009001
0x90000020 <function_in_ext_flash+32>:	0x960008a6	0x0000086e	0x960024e0	0xf8000880

FRASTM · 2024-02-07T13:30:24Z

adding the support of the stm32l496 disco kit with single quad-flash :

[00:00:00.000,000] <inf> flash_stm32_qspi: Reading SFDP
[00:00:00.000,000] <inf> flash_stm32_qspi: qspi-nor-flash@90000000: SFDP v 1.6 AP ff with 3 PH
[00:00:00.000,000] <inf> flash_stm32_qspi: PH0: ff00 rev 1.6: 16 DW @ 30
[00:00:00.000,000] <inf> flash_stm32_qspi: Reading SFDP
[00:00:00.000,000] <inf> flash_stm32_qspi: qspi-nor-flash@90000000: 8 MiBy flash
[00:00:00.000,000] <inf> flash_stm32_qspi: Quad read mode 4 instr [0x6b] supported
[00:00:00.000,000] <inf> flash_stm32_qspi: Quad read mode 7 instr [0xeb] supported
[00:00:00.000,000] <inf> flash_stm32_qspi: Quad read mode 7 instr [0xeb] will be used
[00:00:00.000,000] <inf> flash_stm32_qspi: QE requirement mode: 2
[00:00:00.000,000] <inf> flash_stm32_qspi: Quad mode enabled
[00:00:00.000,000] <inf> flash_stm32_qspi: PH1: ffc2 rev 1.0: 4 DW @ 110
*** Booting Zephyr OS build zephyr-v3.5.0-5288-g918bf5d05858 ***
Address of main function 0x8000589
Address of function_in_ext_flash 0x90000001
Address of var_ext_sram_data 0x200000e0 (10)
Address of function_in_sram 0x20000001
Address of var_sram_data 0x200000e4 (10)
Hello World! stm32l496g_disco

This CONFIG_STM32_MEMMAP is for enabling the MemoryMapped mode on external octo or quad spi memory. In this case, the flash_stm32_read is done in mem map mode the flash_stm32_erase is not available. Signed-off-by: Francois Ramu <[email protected]>

Enable the MemoryMapped Mode for the stm32 octoFlash driver Configure the Flash in MemoryMapped to use in XiP mode. With this mode the erase and write are not supported. Address and size are given by the DTS register property. Signed-off-by: Francois Ramu <[email protected]>

This change is aborting the memoryMapped mode of the octo-flash before erasing or writing the NOR. Operations are performed in command mode. Reading is always performed in MemoryMapped mode (memcopy) Signed-off-by: Francois Ramu <[email protected]>

Skip the PLL1 init if it is already running, this will avoid disabling the PLL when running after a jump from mcuboot. In case of XiP, the pll must not be reinit because it clocks the octo-quad SPI instance which accesses the external NOR flash. Signed-off-by: Francois Ramu <[email protected]>

Define the configuration to run the code_relocation application on the external memory octo flash of the stm32u585 or stm32h7b3i disco kit in XIP Signed-off-by: Francois Ramu <[email protected]>

Configures the external NOR Flash in MemoryMapped Mode, at the end of the NOR flash-controller initialization. Then reading/writing are performed in MemoryMapped mode with memcopy (and no more with command mode). In this mode: erasing is not supported anymore. The flash size and address are given by the DTS <reg> property. Signed-off-by: Francois Ramu <[email protected]>

luispimo · 2024-03-29T21:25:48Z

I would like to use it on a stm32f7508_dk since the internal flash is very small, but I get a MPU_FAULT at boot:

*** Booting Zephyr OS build v3.6.0-1933-gdf51b82cc598 ***
Address of main function 0x800059d
[00:00:00.000,000] <err> os: ***** MPU FAULT *****
[00:00:00.000,000] <err> os:   Instruction Access Violation
[00:00:00.000,000] <err> os: r0/a1:  0x00000007  r1/a2:  0x00000000  r2/a3:  0x00000008
[00:00:00.000,000] <err> os: r3/a4:  0x00000000 r12/ip:  0x00000000 r14/lr:  0x080005b1
[00:00:00.000,000] <err> os:  xpsr:  0x61000000
[00:00:00.000,000] <err> os: Faulting instruction address (r15/pc): 0x90000000                                                         
[00:00:00.000,000] <err> os: >>> ZEPHYR FATAL ERROR 20: Unknown error on CPU 0                                                         
[00:00:00.000,000] <err> os: Current thread: 0x200107e8 (unknown)                                                                      
[00:00:00.107,000] <err> os: Halting system

Is it possible? Am I doing something wrong?

FRASTM · 2024-04-19T09:35:09Z

flash_stm32_qspi driver supporting the dual flash mode with 2 identical quad-NOR mounted
testing on the stm32h750b_dk disco kit: west build -p auto -b stm32h750b_dk samples/application_development/code_relocation_nocopy/
When the quad flash are in MEMMAP mode,

[00:00:00.000,000] <inf> flash_stm32_qspi: Reading SFDP                                                                            
[00:00:00.000,000] <inf> flash_stm32_qspi: qspi-nor-flash-1@90000000: 64 MiBy flash                                                                                                      
...                                                                                                                  
[00:00:00.000,000] <inf> flash_stm32_qspi: Quad mode enabled  
...                                                                                         
[00:00:00.000,000] <dbg> flash_stm32_qspi: flash_stm32_qspi_init: Dual Flash Mode                                                  
[00:00:00.000,000] <dbg> flash_stm32_qspi: flash_stm32_qspi_init: NOR quad-flash in MemoryMapped mode at 0x90000000 (0x4000000 byt)
*** Booting Zephyr OS build v3.6.0-1946-g66d42c0c889f ***                                                                          
Address of main function 0x800066d                                                                                                 
Address of function_in_ext_flash 0x90000001                                                                                        
Address of var_ext_sram_data 0x240000e0 (10)                                                                                       
Address of function_in_sram 0x24000001                                                                                             
Address of var_sram_data 0x240000e4 (10)                                                                                           
Hello World! stm32h750b_dk

FRASTM · 2024-04-19T12:38:58Z

with the stm32h747 disco, the samples/application_development/code_relocation_nocopy is correctly flashed and executed until an ARM bl instruction to a address in a blank page !?

Configure the quad-spi in DualFlash Mode when enabling the MemoryMapped then reading is possible with memcopy. DUAL flash mode is possible on stm32 series with QUADSPI_CR_DFM Signed-off-by: Francois Ramu <[email protected]>

Define the MPU attribute to be ATTR_MPU_EXTMEM for the external region (qspi- or octo-spi NOR flash) starting at 0x90000000 of the stm32h7 serie. Another region should be Included inside with attribute ATTR_MPU_IO, to access the external memory in XIP. Signed-off-by: Francois Ramu <[email protected]>

efine the MPU attribute to be ATTR_MPU_EXTMEM for the external region (qspi-spi NOR flash) starting at 0x90000000 of the stm32f7 serie. Another region should be Included inside with attribute ATTR_MPU_IO, to access the external memory in XIP. Signed-off-by: Francois Ramu <[email protected]>

Enable the Dual Flash Mode on the stm32h750b_dk to access both quad flash in parallel as mounted on the hardware. Signed-off-by: Francois Ramu <[email protected]>

Declare a sub-region of the whole ext_memory with attributes ATTR_MPU_IO so that XiP becomes possible on this external quad- octo- NOR flash Signed-off-by: Francois Ramu <[email protected]>

Define a partition to the stm32l496g_dk board Signed-off-by: Francois Ramu <[email protected]>

Consider the quad-NOR is single flash mode enabled That will avoid configuring the dual flash on this target Signed-off-by: Francois Ramu <[email protected]>

Define a partition to the stm32h747_disco board Signed-off-by: Francois Ramu <[email protected]>

FRASTM · 2024-04-19T13:25:06Z

I would like to use it on a stm32f7508_dk since the internal flash is very small, but I get a MPU_FAULT at boot:

*** Booting Zephyr OS build v3.6.0-1933-gdf51b82cc598 ***
Address of main function 0x800059d
[00:00:00.000,000] <err> os: ***** MPU FAULT *****
[00:00:00.000,000] <err> os:   Instruction Access Violation
[00:00:00.000,000] <err> os: r0/a1:  0x00000007  r1/a2:  0x00000000  r2/a3:  0x00000008
[00:00:00.000,000] <err> os: r3/a4:  0x00000000 r12/ip:  0x00000000 r14/lr:  0x080005b1
[00:00:00.000,000] <err> os:  xpsr:  0x61000000
[00:00:00.000,000] <err> os: Faulting instruction address (r15/pc): 0x90000000                                                         
[00:00:00.000,000] <err> os: >>> ZEPHYR FATAL ERROR 20: Unknown error on CPU 0                                                         
[00:00:00.000,000] <err> os: Current thread: 0x200107e8 (unknown)                                                                      
[00:00:00.107,000] <err> os: Halting system

Is it possible? Am I doing something wrong?

Well, I have checked with a stm32f746g_disco, the flash_stm32_qspi driver and the qspi_set_memorymap function requires 10 dummy cylce for the this quad-NOR
Then this board has a single-quad flash, --> I set the flash-id = <1>; in the board DTS &quadspi NODE
Plus I set the ATTR_MPU_IO to the quadspi_memory region to have code executed in XiP

west build -p auto -b stm32f746g_disco samples/application_development/code_relocation_nocopy/ gives :

*** Booting Zephyr OS build v3.6.0-1947-gc5977f033c07 ***                                                                          
Address of main function 0x800059d                                                                                                 
Address of function_in_ext_flash 0x90000001                                                                                        
Address of var_ext_sram_data 0x200100e0 (10)                                                                                       
Address of function_in_sram 0x20010001                                                                                             
Address of var_sram_data 0x200100e4 (10)                                                                                           
Hello World! stm32f746g_disco

FRASTM · 2024-04-19T13:30:30Z

new quad-spi driver supporting dual or single quad-flash
Tested on stm32l496g_disco --> single quad-flash
Tested on stm32f746g_disco --> single quad-flash
Tested on stm32h750i_disco --> dual quad-flash

Define the configuration to run the code_relocation application on the external memory quad flash of the stm32h7 or stm32f7 or stm32l496g disco kit in XIP Signed-off-by: Francois Ramu <[email protected]>

FRASTM · 2024-05-17T08:04:21Z

This PR is similar to #72339

FRASTM force-pushed the xip_qspi branch 3 times, most recently from f283d25 to 58e4dc0 Compare February 6, 2024 10:47

FRASTM mentioned this pull request Feb 6, 2024

STM32: QSPI: Dual Flash mode not always supported #68449

Closed

FRASTM force-pushed the xip_qspi branch 2 times, most recently from a1ca7a4 to 2ade820 Compare February 7, 2024 13:29

FRASTM force-pushed the xip_qspi branch 2 times, most recently from f73709c to fdfbb29 Compare February 13, 2024 11:11

This was referenced Feb 20, 2024

drivers: stm32 qspi flash driver enables the MemoryMapped mode #61122

Closed

stm32H7 external NOR ospi flash in memorymapped mode #62349

Closed

FRASTM added 6 commits March 29, 2024 17:26

samples: code relocation in external memory of stm32 disco kit

2249b7e

Define the configuration to run the code_relocation application on the external memory octo flash of the stm32u585 or stm32h7b3i disco kit in XIP Signed-off-by: Francois Ramu <[email protected]>

FRASTM force-pushed the xip_qspi branch from fdfbb29 to df51b82 Compare March 29, 2024 16:33

FRASTM force-pushed the xip_qspi branch from df51b82 to 1a18bd2 Compare April 19, 2024 09:26

FRASTM force-pushed the xip_qspi branch from 1a18bd2 to 09b57e2 Compare April 19, 2024 09:38

FRASTM added 5 commits April 19, 2024 15:02

boards: arm: stm32h750 disco kit has dual Flash

ce19c87

Enable the Dual Flash Mode on the stm32h750b_dk to access both quad flash in parallel as mounted on the hardware. Signed-off-by: Francois Ramu <[email protected]>

boards: arm: stm32h7 with external memory region for XiP

71e77df

Declare a sub-region of the whole ext_memory with attributes ATTR_MPU_IO so that XiP becomes possible on this external quad- octo- NOR flash Signed-off-by: Francois Ramu <[email protected]>

FRASTM added 3 commits April 19, 2024 15:18

boards: arm: stm32l496 disco kit has external Flash

84485b6

Define a partition to the stm32l496g_dk board Signed-off-by: Francois Ramu <[email protected]>

boards: arm: stm32f746g_disco kit has external Flash

08e37fe

Consider the quad-NOR is single flash mode enabled That will avoid configuring the dual flash on this target Signed-off-by: Francois Ramu <[email protected]>

boards: arm: stm32h747i_disco kit has external Flash

9bfae1c

Define a partition to the stm32h747_disco board Signed-off-by: Francois Ramu <[email protected]>

FRASTM force-pushed the xip_qspi branch from 09b57e2 to 94df152 Compare April 19, 2024 13:20

samples: code relocation in external memory of stm32 disco kit

0f2c15f

Define the configuration to run the code_relocation application on the external memory quad flash of the stm32h7 or stm32f7 or stm32l496g disco kit in XIP Signed-off-by: Francois Ramu <[email protected]>

FRASTM force-pushed the xip_qspi branch from 94df152 to 0f2c15f Compare April 19, 2024 13:36

FRASTM mentioned this pull request May 6, 2024

stm32: add memory-mapped mode for QUADSPI #72339

Merged

FRASTM closed this May 17, 2024

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stm32 QSPI flash driver enables XiP on external NOR flash #68607

stm32 QSPI flash driver enables XiP on external NOR flash #68607

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stm32 QSPI flash driver enables XiP on external NOR flash #68607

stm32 QSPI flash driver enables XiP on external NOR flash #68607

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