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adin2111: OA support and fixes #68532
adin2111: OA support and fixes #68532
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LGTM |
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Add other 2 small patches. |
Hi, Add Open Alliance SPI support. This is actually the most complex patch of the set, btw, i reused existing Microchip Open Alliance module for this. |
@gmarull ^ |
@@ -758,10 +891,14 @@ static int adin2111_await_device(const struct device *dev) | |||
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/* await reset complete (RESETC) and clear it */ | |||
for (count = 0U; count < ADIN2111_RESETC_AWAIT_RETRY_COUNT; ++count) { | |||
ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS0, &val); | |||
ret = eth_adin2111_reg_read(dev, ADIN2111_PHYID, &val); |
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Not sure about that change. The RM mentions STATUS0 poll. Will need to test.
That also leaks PHY part into MAC (ADIN2111_PHYID
, ADIN2111_PHYID_OUI
).
Do you use HW reset? If no, then it could be related to clock stabilization delay (done within hw reset).
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Thaks,
i tested mainly using the button reset. And i see that keeping the reset button pressed adin2111 clock stops.
Reading a read-only reg currently may not be the best, sure, but it works reliably, and allows "Generic SPI without CRC" to work.
What about if i move the check in the phy code ?
Anyway, i am asking also suggestions to the adi team right now.
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@spectrum70 in cases when hw reset is not used does increasing the delay from 10ms to ADIN2111_HW_BOOT_DELAY_MS
helps (line 998
)?
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Anyway, i am asking also suggestions to the adi team right now.
Was there any response from them?
@spectrum70 thank you for the addition, cleanup, and fixes. Tested legacy spi with crc, it works. I am ok with a merge as soon as the driver config is kept immutable (cs pin is set during config definition). |
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In this PR:
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Thanks to you, a pleasure to work on this driver, nice and clean code. |
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re-pushed
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Does |
@GeorgeCGV when iperf stucks, mainly, the adin2111 receiving thread is blocked.
In this state, packets can still be sent out (checked this by restarting zperf) but nothing is received, becouse there is no hw interrupt issued from adin2111 (checked by oscilloscope). So strangely, only for Open Alliance, fast packet transmission by zperf for some reason locks the adin2111. [edited] |
That is great. Feel free to change the status to "Ready for review" when it works as expected. |
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Hi, oa_tc6 common code cannot be used in a profitable way, due to :
I am attaching some zperf tests. test-zephyr-adin2111ebz-iperf.txt Waiting for comments. PS: there is still a brief outstanding issue open, not related to this job, but i am investigating on it. I noticed that on incoming udp packet of size 1512, generic spi fails on "Still some length to go 2" net pkt message. |
Fixed the issue reported above ("Still some length to go 2" net pkt message.). |
Fix IAMSK1 TX_READY_MASK bitfield position. Signed-off-by: Angelo Dureghello <[email protected]>
Enable appending of a crc32 at the end of the frame by the MAC, always. This is always needed since the driver is not adding it. This field has nothing to do with Generic SPI protocol-related 8-bit CRC, so this patch removes the CONFIG_ETH_ADIN2111_SPI_CFG0 choice related to this setting. Testing without this flag set, packets are not forwareded in the network, since the driver is not appending any crc32 header to the frame. Signed-off-by: Angelo Dureghello <[email protected]>
After some debugging related to non-working "Generic SPI without CRC" mode in eval_adin2111_ebz (CONFIG_ETH_ADIN2111_SPI_CFG0=n), noticed that even after proper STATUS0 RESETC bit detection, registers, for a certain period (some msecs) still reads as zero. This patch fixes adin2111_await_device and with it the "Generic SPI without CRC" mode. Signed-off-by: Angelo Dureghello <[email protected]>
Non functional change, removing unused variable producing compilation warning in "Generic SPI without CRC8" mode. Signed-off-by: Angelo Dureghello <[email protected]>
Add Open Alliance spi protocol support. Open Alliance is a chunk-based SPI protocol, based on sending over SPI an ethernet frame divided in smaller chunks, using a specific 32-bit header for each chunk transferred. All chunks can be sent or received by a single dma transfer. Default mode is set to Open Alliance SPI without protection, since the adin2111 dev. board comes shipped this way. Tested: - Open Alliance SPI, no protection (default board shipped) - Open Alliance SPI, protection - Generic SPI, no crc - Generic SPI, with crc8 Signed-off-by: Angelo Dureghello <[email protected]>
Fix issue related to "generic SPI" mode only, when a packet of 1512 bytes is received, net_pkt_write() fails and thrwos the error: "Still some length to go 2". This is due to net_pkt_rx_alloc_with_buffer() allocating a maximum mtu/size of 1514, and driver is not removing 4 bytes of crc32 from rx buffer, that comes to be 1516 (2 bytes over buffer limit). Fix generic SPI rx frame size removing crc32 bytes. Signed-off-by: Angelo Dureghello <[email protected]>
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Adding also new zperf board to board measurement, udp is at 8.5Mbit/s |
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not my usual cup of tea but LGTM for the general part
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Nice work, tested generic spi with enabled crc, everything works.
if (ctx->oa) { | ||
if (status1 & ADIN2111_STATUS1_P1_RX_RDY) { | ||
ret = eth_adin2111_oa_data_read(dev, 0); | ||
if (ret < 0) { | ||
break; | ||
} | ||
} | ||
if (status1 & ADIN2111_STATUS1_P2_RX_RDY) { | ||
ret = eth_adin2111_oa_data_read(dev, 1); | ||
if (ret < 0) { | ||
break; | ||
} | ||
} | ||
goto continue_unlock; | ||
} |
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@spectrum70 , completely missed during the review, there should be no break
for the ctx->oa
code; as there is no while
. The break
will terminate the irq offload thread. Because the thread is K_ESSENTIAL
the kernel should crash.
Started to work on this driver, to optimize and add missing features.