dts: sifive: Update SoC compats

Update compatible strings to make them consistent across SiFive SoCs. Signed-off-by: Franciszek Zdobylak <[email protected]>
zephyrproject-rtos · Apr 18, 2024 · f0f897d · f0f897d
1 parent 53fa757
commit f0f897d
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/dts/riscv/sifive/riscv64-fu540.dtsi b/dts/riscv/sifive/riscv64-fu540.dtsi
@@ -51,7 +51,7 @@
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "simple-bus";
+		compatible = "fu540-soc", "sifive-soc", "simple-bus";
 		ranges;
 
 		modeselect: rom@1000 {

diff --git a/dts/riscv/sifive/riscv64-fu740.dtsi b/dts/riscv/sifive/riscv64-fu740.dtsi
@@ -102,7 +102,7 @@
 	soc {
 		#address-cells = <2>;
 		#size-cells = <2>;
-		compatible = "simple-bus";
+		compatible = "fu740-soc", "sifive-soc", "simple-bus";
 		ranges;
 
 		modeselect: rom@1000 {