boards: silabs: Add xG29-RB4412A radio board

Add radio board for EFR32MG29 device.

Signed-off-by: Aksel Skauge Mellbye <[email protected]>

boards/silabs/radio_boards/xg29_rb4412a/Kconfig.defconfig

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+# Copyright (c) 2025 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XG29_RB4412A
+
+config LOG_BACKEND_SWO_FREQ_HZ
+	default 875000
+	depends on LOG_BACKEND_SWO
+
+if SOC_GECKO_USE_RAIL
+
+config FPU
+	default y
+
+endif # SOC_GECKO_USE_RAIL
+
+if BT
+
+config FPU
+	default y
+
+config COMMON_LIBC_MALLOC_ARENA_SIZE
+	default 8192
+
+config MAIN_STACK_SIZE
+	default 3072 if PM
+	default 2304
+
+endif # BT
+
+endif # BOARD_XG29_RB4412A

boards/silabs/radio_boards/xg29_rb4412a/Kconfig.xg29_rb4412a

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+# Copyright (c) 2025 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XG29_RB4412A
+	select SOC_PART_NUMBER_EFR32MG29B140F1024IM40

boards/silabs/radio_boards/xg29_rb4412a/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=EFR32MG29BxxxF1024")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+
+board_runner_args(silabs_commander "--device=EFR32MG29B140F1024IM40")
+include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake)

boards/silabs/radio_boards/xg29_rb4412a/board.yml

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+board:
+  name: xg29_rb4412a
+  full_name: EFR32xG29 2.4 GHz 8 dBm Buck (xG29-RB4412A)
+  vendor: silabs
+  socs:
+    - name: efr32mg29b140f1024im40

boards/silabs/radio_boards/xg29_rb4412a/doc/index.rst

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+.. zephyr:board:: xg29_rb4412a
+
+Overview
+********
+
+The xG24-RB4412A radio board provides support for the Silicon Labs EFR32MG29 SoC.
+
+Hardware
+********
+
+- EFR32MG29B140F1024IM40 SoC
+- CPU core: ARM Cortex®-M33 with FPU
+- Flash memory: 1024 kB
+- RAM: 256 kB
+- Transmit power: up to +8 dBm
+- Operation frequency: 2.4 GHz
+- Crystal oscillators for LFXO (32.768 kHz) and HFXO (38.4 MHz)
+
+Supported Features
+==================
+
+The ``xg29_rb4412a`` board target supports the following hardware features:
+
++-----------+------------+------------------------+
+| Interface | Controller | Driver/Component       |
++===========+============+========================+
+| CMU       | on-chip    | clock control          |
++-----------+------------+------------------------+
+| MSC       | on-chip    | flash                  |
++-----------+------------+------------------------+
+| GPIO      | on-chip    | gpio, pin control      |
++-----------+------------+------------------------+
+| RTCC      | on-chip    | system clock, counter  |
++-----------+------------+------------------------+
+| MPU       | on-chip    | memory protection unit |
++-----------+------------+------------------------+
+| NVIC      | on-chip    | interrupt controller   |
++-----------+------------+------------------------+
+| USART     | on-chip    | serial, spi            |
++-----------+------------+------------------------+
+| EUSART    | on-chip    | serial, spi            |
++-----------+------------+------------------------+
+| I2C       | on-chip    | i2c                    |
++-----------+------------+------------------------+
+| LDMA      | on-chip    | dma                    |
++-----------+------------+------------------------+
+| WDOG      | on-chip    | watchdog               |
++-----------+------------+------------------------+
+| SE        | on-chip    | entropy                |
++-----------+------------+------------------------+
+| RADIO     | on-chip    | bluetooth              |
++-----------+------------+------------------------+
+
+Programming and Debugging
+*************************
+
+Applications for the ``xg29_rb4412a`` board target can be built, flashed, and debugged in the
+usual way. See :ref:`build_an_application` and :ref:`application_run` for more details on
+building and running.
+
+Flashing
+========
+
+As an example, this section shows how to build and flash the :zephyr:code-sample:`hello_world`
+application.
+
+To build and program the sample to the xG24-RB4412A, complete the following steps:
+
+First, plug the xG24-RB4412A to a compatible mainboard and connect the mainboard to your computer
+using the USB port on the left side.
+Next, build and flash the sample by running the following command:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: xg29_rb4412a
+   :goals: build flash
+
+``west flash`` will by default use SEGGER JLink. Make sure that the JLinkExe binary is available on
+the PATH. Alternatively, use ``west flash -r silabs_commander`` to use Simplicity Commander to flash.
+In this case, make sure that the commander binary is available on PATH.
+
+Open a serial terminal (minicom, putty, etc.) with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Reset the board and you should see the following message in the terminal:
+
+.. code-block:: console
+
+   Hello World! xg29_rb4412a
+
+Bluetooth
+=========
+
+To use the BLE function, run the command below to retrieve necessary binary
+blobs from the SiLabs HAL repository.
+
+.. code-block:: console
+
+   west blobs fetch hal_silabs
+
+Then build the Zephyr kernel and a Bluetooth sample with the following
+command. The :zephyr:code-sample:`bluetooth_observer` sample application is used in
+this example.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/bluetooth/observer
+   :board: xg29_rb4412a
+   :goals: build

boards/silabs/radio_boards/xg29_rb4412a/pre_dt_board.cmake

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+# Copyright (c) 2021 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+# SPI is implemented via usart/eusart so node name isn't spi@...
+list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

boards/silabs/radio_boards/xg29_rb4412a/xg29_rb4412a-pinctrl.dtsi

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+/*
+ * Copyright (c) 2025 Silicon Laboratories Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/silabs/xg29-pinctrl.h>
+
+&pinctrl {
+	usart1_default: usart1_default {
+		group0 {
+			pins = <USART1_TX_PA5>;
+			drive-push-pull;
+			output-high;
+		};
+		group1 {
+			pins = <USART1_RX_PA6>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	eusart1_default: eusart1_default {
+		group0 {
+			pins = <EUSART1_TX_PC0>, <EUSART1_SCLK_PC2>;
+			drive-push-pull;
+			output-high;
+		};
+		group1 {
+			pins = <EUSART1_RX_PC1>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group0 {
+			pins = <I2C0_SCL_PB2>, <I2C0_SDA_PB3>;
+			drive-open-drain;
+			bias-pull-up;
+		};
+	};
+};