dts: espressif: Add cache nodes

Add icache and dcache memory areas.
zephyrproject-rtos · Jan 31, 2025 · ae7976a · ae7976a
1 parent e50546c
commit ae7976a
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Showing 2 changed files with 38 additions and 8 deletions.
diff --git a/dts/xtensa/espressif/esp32/esp32_common.dtsi b/dts/xtensa/espressif/esp32/esp32_common.dtsi
@@ -94,6 +94,32 @@
 	};
 
 	soc {
+		icache0: memory@400d0000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x400d0000 DT_SIZE_K(11456)>;
+			zephyr,memory-region = "ICACHE";
+		};
+
+		dcache0: memory@3f400000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x3F400000 DT_SIZE_M(4)>;
+			zephyr,memory-region = "DCACHE";
+		};
+/*
+		dcache1: memory@3f800000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x3f800000 DT_SIZE_M(4)>;
+			zephyr,memory-region = "DCACHE";
+		};
+*/
+		psram0: psram@3f800000 {
+			device_type = "memory";
+			compatible = "mmio-sram";
+			/* PSRAM size is specified in SOC/SIP dtsi */
+			reg = <0x3f800000 DT_SIZE_M(2)>;
+			status = "disabled";
+		};
+
 		sram0: memory@40070000 {
 			compatible = "zephyr,memory-region", "mmio-sram";
 			reg = <0x40070000 DT_SIZE_K(192)>;
@@ -189,14 +215,6 @@
 			};
 		};
 
-		psram0: psram@3f800000 {
-			device_type = "memory";
-			compatible = "mmio-sram";
-			/* PSRAM size is specified in SOC/SIP dtsi */
-			reg = <0x3f800000 DT_SIZE_M(2)>;
-			status = "disabled";
-		};
-
 		ipi0: ipi@3f4c0058 {
 			compatible = "espressif,crosscore-interrupt";
 			reg = <0x3f4c0058 0x4>;

diff --git a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
@@ -86,6 +86,18 @@
 		compatible = "simple-bus";
 		ranges;
 
+		icache0: memory@42000000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x42000000 DT_SIZE_M(32)>;
+			zephyr,memory-region = "ICACHE";
+		};
+
+		dcache0: memory@3c000000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x3c000000 DT_SIZE_M(32)>;
+			zephyr,memory-region = "DCACHE";
+		};
+
 		sram0: memory@40370000 {
 			compatible = "zephyr,memory-region", "mmio-sram";
 			reg = <0x40370000 DT_SIZE_K(32)>;