Skip to content

Commit

Permalink
hal: renesas: Remove unused definitions
Browse files Browse the repository at this point in the history
BSP_CFG_ADCCLK_DIV, BSP_CFG_ADCCLK_SOURCE, BSP_CFG_SDADCCLK_DIV and
BSP_CFG_SDADCCLK_SOURCE are not referenced. Removed these.

BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR was renamed and moved into
`include/zephyr/drivers/clock_control`

Signed-off-by: TOKITA Hiroshi <[email protected]>
  • Loading branch information
soburi committed Sep 15, 2024
1 parent cf43d8d commit 869ab21
Show file tree
Hide file tree
Showing 17 changed files with 0 additions and 48 deletions.
7 changes: 0 additions & 7 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2a1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand All @@ -40,11 +38,6 @@
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(pclkd), clk_div, RA_SYS_CLOCK_DIV_1)
#define BSP_CFG_FCLK_DIV \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(fclk), clk_div, RA_SYS_CLOCK_DIV_2)

#define BSP_CFG_SDADCCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(sdadcclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_SDADCCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(sdadcclk), clk_div, 0)

#define BSP_CFG_CLKOUT_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(clkout), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_CLKOUT_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(clkout), clk_div, 0)
Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e2/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m2/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m3/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4w1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e2/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m2/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m3/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m4/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)

#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
2 changes: 0 additions & 2 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m5/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down
5 changes: 0 additions & 5 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8d1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down Expand Up @@ -116,9 +114,6 @@
#define BSP_CFG_SPICLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_SPICLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_div, 0)
#define BSP_CFG_ADCCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_ADCCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_div, 0)
#define BSP_CFG_I3CCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_I3CCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_div, 0)
Expand Down
5 changes: 0 additions & 5 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8m1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down Expand Up @@ -116,9 +114,6 @@
#define BSP_CFG_SPICLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_SPICLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_div, 0)
#define BSP_CFG_ADCCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_ADCCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_div, 0)
#define BSP_CFG_I3CCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_I3CCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_div, 0)
Expand Down
5 changes: 0 additions & 5 deletions zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8t1/bsp_clock_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,8 +11,6 @@

#define BSP_CFG_CLOCKS_SECURE (0)
#define BSP_CFG_CLOCKS_OVERRIDE (0)
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))

#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)

Expand Down Expand Up @@ -115,9 +113,6 @@
#define BSP_CFG_SPICLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_SPICLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(spiclk), clk_div, 0)
#define BSP_CFG_ADCCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_ADCCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(adcclk), clk_div, 0)
#define BSP_CFG_I3CCLK_SOURCE \
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_src, RA_CLOCK_SOURCE_DISABLE)
#define BSP_CFG_I3CCLK_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(i3cclk), clk_div, 0)
Expand Down

0 comments on commit 869ab21

Please sign in to comment.