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Dev #40

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Dev #40

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Datareshape function(custom_cpu.cc), mergedaddress function(configuration.cc) 추가

shavvn and others added 30 commits May 17, 2019 19:39
Add GDDR6/LPDDR4 configs
TODO: Add gem5 patch
Point to paper
update structure format
add papers
add gem5 ref
link to new git module
Link to SST and ZSim
Update naming
update CI
- Add New Memory Request Tpye (MRS) and receive MRS transaction -> This is a temporary method because a typical memory controller does not receive MRS requests externally.
- Add tMRD, tMOD Timing parameter to support MRS Commmand.
- MRS Command has high priority than other DRAM command except refresh command.
- Add deticated transcation queue for MRS Transcation and command queue
  and MRS command.
- Support some features of LRDIMM  (e.g., RCD, DB)
- Not yet implemented LDIMM-specific implementation timing parameters
- Not yet validated
- It only support when LRDIMM Mode
- Add Data Variable on Transaction (DDR Command does not have data type)
- Add Data Memory in each DIMM
Debug Write/Read Data Path
Add display the result of data check
- add write data reshape function
- add read data reshape function
- Referenced DRAM DQ mapping from Micron DDR4 SDRAM LRDIMM Spec.
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4 participants