add eiret feret

tmori · Jul 1, 2018 · 64fff1b · 64fff1b
1 parent 7989545
commit 64fff1b
Show file tree

Hide file tree

Showing 5 changed files with 20 additions and 2 deletions.
diff --git a/bin/linux/athrill2 b/bin/linux/athrill2
diff --git a/trunk/src/bin/athrill2 b/trunk/src/bin/athrill2
diff --git a/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec.h b/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec.h
@@ -42,8 +42,8 @@ extern OpExecType op_exec_table[OP_EXEC_TABLE_NUM];
 #define op_exec_divqu_11 op_exec_divqu_11
 #define op_exec_divu_11 op_exec_divu
 #define op_exec_ei_10 op_exec_diei
-#define op_exec_eiret_10 NULL /* TODO */
-#define op_exec_feret_10 NULL /* TODO */
+#define op_exec_eiret_10 op_exec_eiret_10
+#define op_exec_feret_10 op_exec_feret_10
 #define op_exec_fetrap_1 NULL /* TODO */
 #define op_exec_halt_10 op_exec_halt
 #define op_exec_hsh_12 op_exec_hsh_12

diff --git a/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec_ops.h b/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec_ops.h
@@ -174,6 +174,8 @@ extern int op_exec_prepare(TargetCoreType *cpu);
 extern int op_exec_dispose(TargetCoreType *cpu);
 extern int op_exec_caxi(TargetCoreType *cpu);
 
+extern int op_exec_feret_10(TargetCoreType *cpu);
+extern int op_exec_eiret_10(TargetCoreType *cpu);
 
 
 /*

diff --git a/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec_spec.c b/trunk/src/cpu/target/v850e2m/cpu_exec/op_exec_spec.c
@@ -225,6 +225,22 @@ int op_exec_reti(TargetCoreType *cpu)
 	}
 	return 0;
 }
+
+int op_exec_feret_10(TargetCoreType *cpu)
+{
+	DBG_PRINT((DBG_EXEC_OP_BUF(), DBG_EXEC_OP_BUF_LEN(), "0x%x: FERET:0x%x\n", cpu->reg.pc, sys_get_cpu_base(&cpu->reg)->r[SYS_REG_FEPC]));
+	cpu->reg.pc = sys_get_cpu_base(&cpu->reg)->r[SYS_REG_FEPC];
+	sys_get_cpu_base(&cpu->reg)->r[SYS_REG_PSW] = sys_get_cpu_base(&cpu->reg)->r[SYS_REG_FEPSW];
+	return 0;
+}
+int op_exec_eiret_10(TargetCoreType *cpu)
+{
+	DBG_PRINT((DBG_EXEC_OP_BUF(), DBG_EXEC_OP_BUF_LEN(), "0x%x: EIRET:0x%x\n", cpu->reg.pc, sys_get_cpu_base(&cpu->reg)->r[SYS_REG_EIPC]));
+	cpu->reg.pc = sys_get_cpu_base(&cpu->reg)->r[SYS_REG_EIPC];
+	sys_get_cpu_base(&cpu->reg)->r[SYS_REG_PSW] = sys_get_cpu_base(&cpu->reg)->r[SYS_REG_EIPSW];
+	return 0;
+}
+
 int op_exec_halt(TargetCoreType *cpu)
 {
 	DBG_PRINT((DBG_EXEC_OP_BUF(), DBG_EXEC_OP_BUF_LEN(), "0x%x: HALT:0x%x\n", cpu->reg.pc, cpu->reg.pc + 4));