[WIP] use FX2Crossbar for communication with FX2 chip in HDMI2USB designs #248
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| @@ -0,0 +1,46 @@ | |||
| module ddr_iobuf(input clk, input d, input oe, output q, inout io); | |||
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It is a replacement for SB_IO iCE40 primitive that was used in the original crossbar design https://github.com/GlasgowEmbedded/glasgow/blob/367ecc4e83cf644c994cd25ab204e019f7568b9c/software/glasgow/gateware/fx2_crossbar.py#L289
It is used as a IO buffer for all signals connected to the FX2 chip
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This should be done in migen, not in verilog?
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Could you also add timing diagrams like @smunaut did at GlasgowEmbedded/glasgow#89 (comment) which verify things will work correctly with the Spartan 6? You should reference https://www.xilinx.com/support/documentation/user_guides/ug381.pdf
Is there a way to also replicate the testing that @whitequark did to prove that everything is working correctly here?
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Could you rebase this commit? |
…ath from sysclk to ifclk domain
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@mateusz-holenko -- Could you work with @piotr-binkowski to get this pull request merged? |
This PR modifies the HDMI2USB target of Opsis and Atlys boards to utilize FX2Crossbar.
Using this crossbar it is possible to access 4 FX2 USB endpoints using LiteX Streams.
Current implementation attaches output from MJPEG encoder and UART to the crossbar which still leaves one free endpoint.
This depends on timvideos/HDMI2USB-fx2-firmware#47