Optimize MCP2515Class::endPacket() by up to 2x #49
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1) Use LOAD TX BUFFER instruction to set TXBn* registers sequentially, as well as to write into the TX data registers. This is done with a single CS pull, and requires sending N+6 bytes over SPI. The old code was doing N+5 writeRegister() calls, each doing 1 CS pull and sending 3 bytes. 2) Use the 1-byte RTS SPI instruction instead of WRITEing to TXBnCTRL. This reduces the number of bytes sent over SPI by 2. For N = 8, - we now send 15 bytes over SPI before the while(...TXBnCTRL...) loop vs 42 (2.8x reduction) - we do just 2 CS pulls before the while(...TXBnCTRL...) loop vs 13 (6.5x reduction) We still do at least 3 CS pulls and send at least 10 bytes over SPI for the condition of the while(...TXBnCTRL...) loop, to clear TXnIF and to check for errors. That means for N = 8, in the case when we do zero iterations of the while loop, we end up sending 25 bytes over SPI instead of 52, which is >2x reduction.
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Optimize MCP2515Class::endPacket()
Use LOAD TX BUFFER instruction to set TXBn* registers sequentially, as well
as to write into the TX data registers.
This is done with a single CS pull, and requires sending N+6 bytes over SPI.
The old code was doing N+5 writeRegister() calls, each doing 1 CS pull and
sending 3 bytes.
Use the 1-byte RTS SPI instruction instead of WRITEing to TXBnCTRL.
This reduces the number of bytes sent over SPI by 2.
For N = 8,
(2.8x reduction)
(6.5x reduction)
We still do at least 3 CS pulls and send at least 10 bytes over SPI for the
condition of the while(...TXBnCTRL...) loop, to clear TXnIF and to check for
errors.
That means for N = 8, in the case when we do zero iterations of the while loop,
we end up sending 25 bytes over SPI instead of 52, which is >2x reduction.