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Reimplement some x86 functions without LLVM intrinsics #1477

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34 changes: 16 additions & 18 deletions crates/core_arch/src/x86/avx.rs
Original file line number Diff line number Diff line change
Expand Up @@ -268,7 +268,11 @@ pub unsafe fn _mm256_mul_ps(a: __m256, b: __m256) -> __m256 {
#[cfg_attr(test, assert_instr(vaddsubpd))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_addsub_pd(a: __m256d, b: __m256d) -> __m256d {
addsubpd256(a, b)
let a = a.as_f64x4();
let b = b.as_f64x4();
let add = simd_add(a, b);
let sub = simd_sub(a, b);
simd_shuffle!(add, sub, [4, 1, 6, 3])
}

/// Alternatively adds and subtracts packed single-precision (32-bit)
Expand All @@ -280,7 +284,11 @@ pub unsafe fn _mm256_addsub_pd(a: __m256d, b: __m256d) -> __m256d {
#[cfg_attr(test, assert_instr(vaddsubps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_addsub_ps(a: __m256, b: __m256) -> __m256 {
addsubps256(a, b)
let a = a.as_f32x8();
let b = b.as_f32x8();
let add = simd_add(a, b);
let sub = simd_sub(a, b);
simd_shuffle!(add, sub, [8, 1, 10, 3, 12, 5, 14, 7])
}

/// Subtracts packed double-precision (64-bit) floating-point elements in `b`
Expand Down Expand Up @@ -511,7 +519,8 @@ pub unsafe fn _mm256_blend_ps<const IMM8: i32>(a: __m256, b: __m256) -> __m256 {
#[cfg_attr(test, assert_instr(vblendvpd))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_blendv_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d {
vblendvpd(a, b, c)
let mask: i64x4 = simd_lt(transmute::<_, i64x4>(c), i64x4::splat(0));
transmute(simd_select(mask, b.as_f64x4(), a.as_f64x4()))
}

/// Blends packed single-precision (32-bit) floating-point elements from
Expand All @@ -523,7 +532,8 @@ pub unsafe fn _mm256_blendv_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d {
#[cfg_attr(test, assert_instr(vblendvps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_blendv_ps(a: __m256, b: __m256, c: __m256) -> __m256 {
vblendvps(a, b, c)
let mask: i32x8 = simd_lt(transmute::<_, i32x8>(c), i32x8::splat(0));
transmute(simd_select(mask, b.as_f32x8(), a.as_f32x8()))
}

/// Conditionally multiplies the packed single-precision (32-bit) floating-point
Expand Down Expand Up @@ -2056,7 +2066,7 @@ pub unsafe fn _mm_testnzc_ps(a: __m128, b: __m128) -> i32 {
#[cfg_attr(test, assert_instr(vmovmskpd))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_movemask_pd(a: __m256d) -> i32 {
movmskpd256(a)
simd_bitmask::<u64x4, u8>(transmute(a)).into()
}

/// Sets each bit of the returned mask based on the most significant bit of the
Expand All @@ -2069,7 +2079,7 @@ pub unsafe fn _mm256_movemask_pd(a: __m256d) -> i32 {
#[cfg_attr(test, assert_instr(vmovmskps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_movemask_ps(a: __m256) -> i32 {
movmskps256(a)
simd_bitmask::<u32x8, u8>(transmute(a)).into()
}

/// Returns vector of type __m256d with all elements set to zero.
Expand Down Expand Up @@ -2904,20 +2914,12 @@ pub unsafe fn _mm256_cvtss_f32(a: __m256) -> f32 {
// LLVM intrinsics used in the above functions
#[allow(improper_ctypes)]
extern "C" {
#[link_name = "llvm.x86.avx.addsub.pd.256"]
fn addsubpd256(a: __m256d, b: __m256d) -> __m256d;
#[link_name = "llvm.x86.avx.addsub.ps.256"]
fn addsubps256(a: __m256, b: __m256) -> __m256;
#[link_name = "llvm.x86.avx.round.pd.256"]
fn roundpd256(a: __m256d, b: i32) -> __m256d;
#[link_name = "llvm.x86.avx.round.ps.256"]
fn roundps256(a: __m256, b: i32) -> __m256;
#[link_name = "llvm.x86.avx.sqrt.ps.256"]
fn sqrtps256(a: __m256) -> __m256;
#[link_name = "llvm.x86.avx.blendv.pd.256"]
fn vblendvpd(a: __m256d, b: __m256d, c: __m256d) -> __m256d;
#[link_name = "llvm.x86.avx.blendv.ps.256"]
fn vblendvps(a: __m256, b: __m256, c: __m256) -> __m256;
#[link_name = "llvm.x86.avx.dp.ps.256"]
fn vdpps(a: __m256, b: __m256, imm8: i32) -> __m256;
#[link_name = "llvm.x86.avx.hadd.pd.256"]
Expand Down Expand Up @@ -3026,10 +3028,6 @@ extern "C" {
fn vtestcps(a: __m128, b: __m128) -> i32;
#[link_name = "llvm.x86.avx.vtestnzc.ps"]
fn vtestnzcps(a: __m128, b: __m128) -> i32;
#[link_name = "llvm.x86.avx.movmsk.pd.256"]
fn movmskpd256(a: __m256d) -> i32;
#[link_name = "llvm.x86.avx.movmsk.ps.256"]
fn movmskps256(a: __m256) -> i32;
#[link_name = "llvm.x86.avx.min.ps.256"]
fn vminps(a: __m256, b: __m256) -> __m256;
#[link_name = "llvm.x86.avx.max.ps.256"]
Expand Down
46 changes: 25 additions & 21 deletions crates/core_arch/src/x86/avx2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -344,7 +344,10 @@ pub unsafe fn _mm256_andnot_si256(a: __m256i, b: __m256i) -> __m256i {
#[cfg_attr(test, assert_instr(vpavgw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_avg_epu16(a: __m256i, b: __m256i) -> __m256i {
transmute(pavgw(a.as_u16x16(), b.as_u16x16()))
let a = simd_cast::<_, u32x16>(a.as_u16x16());
let b = simd_cast::<_, u32x16>(b.as_u16x16());
let r = simd_shr(simd_add(simd_add(a, b), u32x16::splat(1)), u32x16::splat(1));
transmute(simd_cast::<_, u16x16>(r))
}

/// Averages packed unsigned 8-bit integers in `a` and `b`.
Expand All @@ -355,7 +358,10 @@ pub unsafe fn _mm256_avg_epu16(a: __m256i, b: __m256i) -> __m256i {
#[cfg_attr(test, assert_instr(vpavgb))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_avg_epu8(a: __m256i, b: __m256i) -> __m256i {
transmute(pavgb(a.as_u8x32(), b.as_u8x32()))
let a = simd_cast::<_, u16x32>(a.as_u8x32());
let b = simd_cast::<_, u16x32>(b.as_u8x32());
let r = simd_shr(simd_add(simd_add(a, b), u16x32::splat(1)), u16x32::splat(1));
transmute(simd_cast::<_, u8x32>(r))
}

/// Blends packed 32-bit integers from `a` and `b` using control mask `IMM4`.
Expand Down Expand Up @@ -458,7 +464,8 @@ pub unsafe fn _mm256_blend_epi16<const IMM8: i32>(a: __m256i, b: __m256i) -> __m
#[cfg_attr(test, assert_instr(vpblendvb))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_blendv_epi8(a: __m256i, b: __m256i, mask: __m256i) -> __m256i {
transmute(pblendvb(a.as_i8x32(), b.as_i8x32(), mask.as_i8x32()))
let mask: i8x32 = simd_lt(mask.as_i8x32(), i8x32::splat(0));
transmute(simd_select(mask, b.as_i8x32(), a.as_i8x32()))
}

/// Broadcasts the low packed 8-bit integer from `a` to all elements of
Expand Down Expand Up @@ -2060,7 +2067,9 @@ pub unsafe fn _mm256_mpsadbw_epu8<const IMM8: i32>(a: __m256i, b: __m256i) -> __
#[cfg_attr(test, assert_instr(vpmuldq))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_mul_epi32(a: __m256i, b: __m256i) -> __m256i {
transmute(pmuldq(a.as_i32x8(), b.as_i32x8()))
let a = simd_cast::<_, i64x4>(simd_cast::<_, i32x4>(a.as_i64x4()));
let b = simd_cast::<_, i64x4>(simd_cast::<_, i32x4>(b.as_i64x4()));
transmute(simd_mul(a, b))
}

/// Multiplies the low unsigned 32-bit integers from each packed 64-bit
Expand All @@ -2074,7 +2083,10 @@ pub unsafe fn _mm256_mul_epi32(a: __m256i, b: __m256i) -> __m256i {
#[cfg_attr(test, assert_instr(vpmuludq))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_mul_epu32(a: __m256i, b: __m256i) -> __m256i {
transmute(pmuludq(a.as_u32x8(), b.as_u32x8()))
let a = a.as_u64x4();
let b = b.as_u64x4();
let mask = u64x4::splat(u32::MAX.into());
transmute(simd_mul(simd_and(a, mask), simd_and(b, mask)))
}

/// Multiplies the packed 16-bit integers in `a` and `b`, producing
Expand All @@ -2087,7 +2099,10 @@ pub unsafe fn _mm256_mul_epu32(a: __m256i, b: __m256i) -> __m256i {
#[cfg_attr(test, assert_instr(vpmulhw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_mulhi_epi16(a: __m256i, b: __m256i) -> __m256i {
transmute(pmulhw(a.as_i16x16(), b.as_i16x16()))
let a = simd_cast::<_, i32x16>(a.as_i16x16());
let b = simd_cast::<_, i32x16>(b.as_i16x16());
let r = simd_shr(simd_mul(a, b), i32x16::splat(16));
transmute(simd_cast::<i32x16, i16x16>(r))
}

/// Multiplies the packed unsigned 16-bit integers in `a` and `b`, producing
Expand All @@ -2100,7 +2115,10 @@ pub unsafe fn _mm256_mulhi_epi16(a: __m256i, b: __m256i) -> __m256i {
#[cfg_attr(test, assert_instr(vpmulhuw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_mulhi_epu16(a: __m256i, b: __m256i) -> __m256i {
transmute(pmulhuw(a.as_u16x16(), b.as_u16x16()))
let a = simd_cast::<_, u32x16>(a.as_u16x16());
let b = simd_cast::<_, u32x16>(b.as_u16x16());
let r = simd_shr(simd_mul(a, b), u32x16::splat(16));
transmute(simd_cast::<u32x16, u16x16>(r))
}

/// Multiplies the packed 16-bit integers in `a` and `b`, producing
Expand Down Expand Up @@ -3629,12 +3647,6 @@ extern "C" {
fn pabsw(a: i16x16) -> u16x16;
#[link_name = "llvm.x86.avx2.pabs.d"]
fn pabsd(a: i32x8) -> u32x8;
#[link_name = "llvm.x86.avx2.pavg.b"]
fn pavgb(a: u8x32, b: u8x32) -> u8x32;
#[link_name = "llvm.x86.avx2.pavg.w"]
fn pavgw(a: u16x16, b: u16x16) -> u16x16;
#[link_name = "llvm.x86.avx2.pblendvb"]
fn pblendvb(a: i8x32, b: i8x32, mask: i8x32) -> i8x32;
#[link_name = "llvm.x86.avx2.phadd.w"]
fn phaddw(a: i16x16, b: i16x16) -> i16x16;
#[link_name = "llvm.x86.avx2.phadd.d"]
Expand Down Expand Up @@ -3669,14 +3681,6 @@ extern "C" {
fn maskstoreq256(mem_addr: *mut i8, mask: i64x4, a: i64x4);
#[link_name = "llvm.x86.avx2.mpsadbw"]
fn mpsadbw(a: u8x32, b: u8x32, imm8: i32) -> u16x16;
#[link_name = "llvm.x86.avx2.pmulhu.w"]
fn pmulhuw(a: u16x16, b: u16x16) -> u16x16;
#[link_name = "llvm.x86.avx2.pmulh.w"]
fn pmulhw(a: i16x16, b: i16x16) -> i16x16;
#[link_name = "llvm.x86.avx2.pmul.dq"]
fn pmuldq(a: i32x8, b: i32x8) -> i64x4;
#[link_name = "llvm.x86.avx2.pmulu.dq"]
fn pmuludq(a: u32x8, b: u32x8) -> u64x4;
#[link_name = "llvm.x86.avx2.pmul.hr.sw"]
fn pmulhrsw(a: i16x16, b: i16x16) -> i16x16;
#[link_name = "llvm.x86.avx2.packsswb"]
Expand Down
4 changes: 1 addition & 3 deletions crates/core_arch/src/x86/sse.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1081,7 +1081,7 @@ pub unsafe fn _mm_movelh_ps(a: __m128, b: __m128) -> __m128 {
#[cfg_attr(test, assert_instr(movmskps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_movemask_ps(a: __m128) -> i32 {
movmskps(a)
simd_bitmask::<u32x4, u8>(transmute(a)).into()
}

/// Construct a `__m128` with the lowest element read from `p` and the other
Expand Down Expand Up @@ -1885,8 +1885,6 @@ extern "C" {
fn maxss(a: __m128, b: __m128) -> __m128;
#[link_name = "llvm.x86.sse.max.ps"]
fn maxps(a: __m128, b: __m128) -> __m128;
#[link_name = "llvm.x86.sse.movmsk.ps"]
fn movmskps(a: __m128) -> i32;
#[link_name = "llvm.x86.sse.cmp.ps"]
fn cmpps(a: __m128, b: __m128, imm8: i8) -> __m128;
#[link_name = "llvm.x86.sse.comieq.ss"]
Expand Down
54 changes: 27 additions & 27 deletions crates/core_arch/src/x86/sse2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,10 @@ pub unsafe fn _mm_adds_epu16(a: __m128i, b: __m128i) -> __m128i {
#[cfg_attr(test, assert_instr(pavgb))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_avg_epu8(a: __m128i, b: __m128i) -> __m128i {
transmute(pavgb(a.as_u8x16(), b.as_u8x16()))
let a = simd_cast::<_, u16x16>(a.as_u8x16());
let b = simd_cast::<_, u16x16>(b.as_u8x16());
let r = simd_shr(simd_add(simd_add(a, b), u16x16::splat(1)), u16x16::splat(1));
transmute(simd_cast::<_, u8x16>(r))
}

/// Averages packed unsigned 16-bit integers in `a` and `b`.
Expand All @@ -176,7 +179,10 @@ pub unsafe fn _mm_avg_epu8(a: __m128i, b: __m128i) -> __m128i {
#[cfg_attr(test, assert_instr(pavgw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_avg_epu16(a: __m128i, b: __m128i) -> __m128i {
transmute(pavgw(a.as_u16x8(), b.as_u16x8()))
let a = simd_cast::<_, u32x8>(a.as_u16x8());
let b = simd_cast::<_, u32x8>(b.as_u16x8());
let r = simd_shr(simd_add(simd_add(a, b), u32x8::splat(1)), u32x8::splat(1));
transmute(simd_cast::<_, u16x8>(r))
}

/// Multiplies and then horizontally add signed 16 bit integers in `a` and `b`.
Expand Down Expand Up @@ -261,7 +267,10 @@ pub unsafe fn _mm_min_epu8(a: __m128i, b: __m128i) -> __m128i {
#[cfg_attr(test, assert_instr(pmulhw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_mulhi_epi16(a: __m128i, b: __m128i) -> __m128i {
transmute(pmulhw(a.as_i16x8(), b.as_i16x8()))
let a = simd_cast::<_, i32x8>(a.as_i16x8());
let b = simd_cast::<_, i32x8>(b.as_i16x8());
let r = simd_shr(simd_mul(a, b), i32x8::splat(16));
transmute(simd_cast::<i32x8, i16x8>(r))
}

/// Multiplies the packed unsigned 16-bit integers in `a` and `b`.
Expand All @@ -275,7 +284,10 @@ pub unsafe fn _mm_mulhi_epi16(a: __m128i, b: __m128i) -> __m128i {
#[cfg_attr(test, assert_instr(pmulhuw))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_mulhi_epu16(a: __m128i, b: __m128i) -> __m128i {
transmute(pmulhuw(a.as_u16x8(), b.as_u16x8()))
let a = simd_cast::<_, u32x8>(a.as_u16x8());
let b = simd_cast::<_, u32x8>(b.as_u16x8());
let r = simd_shr(simd_mul(a, b), u32x8::splat(16));
transmute(simd_cast::<u32x8, u16x8>(r))
}

/// Multiplies the packed 16-bit integers in `a` and `b`.
Expand Down Expand Up @@ -303,7 +315,10 @@ pub unsafe fn _mm_mullo_epi16(a: __m128i, b: __m128i) -> __m128i {
#[cfg_attr(test, assert_instr(pmuludq))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_mul_epu32(a: __m128i, b: __m128i) -> __m128i {
transmute(pmuludq(a.as_u32x4(), b.as_u32x4()))
let a = a.as_u64x2();
let b = b.as_u64x2();
let mask = u64x2::splat(u32::MAX.into());
transmute(simd_mul(simd_and(a, mask), simd_and(b, mask)))
}

/// Sum the absolute differences of packed unsigned 8-bit integers.
Expand Down Expand Up @@ -952,7 +967,7 @@ pub unsafe fn _mm_cvtsi32_sd(a: __m128d, b: i32) -> __m128d {
#[cfg_attr(test, assert_instr(cvtdq2ps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_cvtepi32_ps(a: __m128i) -> __m128 {
cvtdq2ps(a.as_i32x4())
transmute(simd_cast::<_, f32x4>(a.as_i32x4()))
}

/// Converts packed single-precision (32-bit) floating-point elements in `a`
Expand Down Expand Up @@ -2240,7 +2255,9 @@ pub unsafe fn _mm_ucomineq_sd(a: __m128d, b: __m128d) -> i32 {
#[cfg_attr(test, assert_instr(cvtpd2ps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_cvtpd_ps(a: __m128d) -> __m128 {
cvtpd2ps(a)
let r = simd_cast::<_, f32x2>(a.as_f64x2());
let zero = f32x2::new(0.0, 0.0);
transmute::<f32x4, _>(simd_shuffle!(r, zero, [0, 1, 2, 3]))
}

/// Converts packed single-precision (32-bit) floating-point elements in `a` to
Expand All @@ -2253,7 +2270,8 @@ pub unsafe fn _mm_cvtpd_ps(a: __m128d) -> __m128 {
#[cfg_attr(test, assert_instr(cvtps2pd))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_cvtps_pd(a: __m128) -> __m128d {
cvtps2pd(a)
let a = a.as_f32x4();
transmute(simd_cast::<f32x2, f64x2>(simd_shuffle!(a, a, [0, 1])))
}

/// Converts packed double-precision (64-bit) floating-point elements in `a` to
Expand Down Expand Up @@ -2432,7 +2450,7 @@ pub unsafe fn _mm_setzero_pd() -> __m128d {
#[cfg_attr(test, assert_instr(movmskpd))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_movemask_pd(a: __m128d) -> i32 {
movmskpd(a)
simd_bitmask::<u64x2, u8>(transmute(a)).into()
}

/// Loads 128-bits (composed of 2 packed double-precision (64-bit)
Expand Down Expand Up @@ -2826,18 +2844,8 @@ extern "C" {
fn lfence();
#[link_name = "llvm.x86.sse2.mfence"]
fn mfence();
#[link_name = "llvm.x86.sse2.pavg.b"]
fn pavgb(a: u8x16, b: u8x16) -> u8x16;
#[link_name = "llvm.x86.sse2.pavg.w"]
fn pavgw(a: u16x8, b: u16x8) -> u16x8;
#[link_name = "llvm.x86.sse2.pmadd.wd"]
fn pmaddwd(a: i16x8, b: i16x8) -> i32x4;
#[link_name = "llvm.x86.sse2.pmulh.w"]
fn pmulhw(a: i16x8, b: i16x8) -> i16x8;
#[link_name = "llvm.x86.sse2.pmulhu.w"]
fn pmulhuw(a: u16x8, b: u16x8) -> u16x8;
#[link_name = "llvm.x86.sse2.pmulu.dq"]
fn pmuludq(a: u32x4, b: u32x4) -> u64x2;
#[link_name = "llvm.x86.sse2.psad.bw"]
fn psadbw(a: u8x16, b: u8x16) -> u64x2;
#[link_name = "llvm.x86.sse2.psll.w"]
Expand All @@ -2856,8 +2864,6 @@ extern "C" {
fn psrld(a: i32x4, count: i32x4) -> i32x4;
#[link_name = "llvm.x86.sse2.psrl.q"]
fn psrlq(a: i64x2, count: i64x2) -> i64x2;
#[link_name = "llvm.x86.sse2.cvtdq2ps"]
fn cvtdq2ps(a: i32x4) -> __m128;
#[link_name = "llvm.x86.sse2.cvtps2dq"]
fn cvtps2dq(a: __m128) -> i32x4;
#[link_name = "llvm.x86.sse2.maskmov.dqu"]
Expand Down Expand Up @@ -2908,12 +2914,6 @@ extern "C" {
fn ucomigesd(a: __m128d, b: __m128d) -> i32;
#[link_name = "llvm.x86.sse2.ucomineq.sd"]
fn ucomineqsd(a: __m128d, b: __m128d) -> i32;
#[link_name = "llvm.x86.sse2.movmsk.pd"]
fn movmskpd(a: __m128d) -> i32;
#[link_name = "llvm.x86.sse2.cvtpd2ps"]
fn cvtpd2ps(a: __m128d) -> __m128;
#[link_name = "llvm.x86.sse2.cvtps2pd"]
fn cvtps2pd(a: __m128) -> __m128d;
#[link_name = "llvm.x86.sse2.cvtpd2dq"]
fn cvtpd2dq(a: __m128d) -> i32x4;
#[link_name = "llvm.x86.sse2.cvtsd2si"]
Expand Down
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