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Clean up docs, fixing indentation and formatting
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nyurik authored and Amanieu committed Sep 28, 2024
1 parent 679eba8 commit d253a32
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4 changes: 2 additions & 2 deletions crates/core_arch/src/core_arch_docs.md
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Expand Up @@ -142,8 +142,8 @@ detail!
the standard library, this macro will perform necessary runtime detection
to determine whether the CPU the program is running on supports the
specified feature. In this case the macro will expand to a boolean
expression evaluating to whether the local CPU has the AVX2 feature or
not.
expression evaluating to whether the local CPU has the AVX2 feature or
not.

Note that this macro, like the `arch` module, is platform-specific. For
example calling `is_x86_feature_detected!("avx2")` on ARM will be a
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3 changes: 1 addition & 2 deletions crates/core_arch/src/simd.rs
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Expand Up @@ -473,7 +473,6 @@ simd_m_ty!(
x7
);


// 512-bit wide types:

simd_ty!(
Expand Down Expand Up @@ -965,6 +964,6 @@ pub(crate) fn debug_simd_finish<T: crate::fmt::Debug, const N: usize>(
crate::fmt::Formatter::debug_tuple_fields_finish(
formatter,
type_name,
&crate::array::from_fn::<&dyn crate::fmt::Debug, N, _>(|i| &array[i])
&crate::array::from_fn::<&dyn crate::fmt::Debug, N, _>(|i| &array[i]),
)
}
4 changes: 2 additions & 2 deletions crates/core_arch/src/x86/abm.rs
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Expand Up @@ -5,9 +5,9 @@
//! The references are:
//!
//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
//! Instruction Set Reference, A-Z][intel64_ref].
//! Instruction Set Reference, A-Z][intel64_ref].
//! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and
//! System Instructions][amd64_ref].
//! System Instructions][amd64_ref].
//!
//! [Wikipedia][wikipedia_bmi] provides a quick overview of the instructions
//! available.
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6 changes: 3 additions & 3 deletions crates/core_arch/src/x86/avx.rs
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Expand Up @@ -3,9 +3,9 @@
//! The references are:
//!
//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
//! Programmer's Manual, Volume 3: General-Purpose and System
//! Instructions][amd64_ref].
//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
//! Programmer's Manual, Volume 3: General-Purpose and System
//! Instructions][amd64_ref].
//!
//! [Wikipedia][wiki] provides a quick overview of the instructions available.
//!
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30 changes: 13 additions & 17 deletions crates/core_arch/src/x86/sse.rs
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Expand Up @@ -1452,21 +1452,19 @@ pub unsafe fn _mm_getcsr() -> u32 {
///
/// It contains several groups of flags:
///
/// * *Exception flags* report which exceptions occurred since last they were
/// reset.
/// * *Exception flags* report which exceptions occurred since last they were reset.
///
/// * *Masking flags* can be used to mask (ignore) certain exceptions. By
/// default
/// these flags are all set to 1, so all exceptions are masked. When an
/// an exception is masked, the processor simply sets the exception flag and
/// continues the operation. If the exception is unmasked, the flag is also set
/// but additionally an exception handler is invoked.
/// * *Masking flags* can be used to mask (ignore) certain exceptions. By default
/// these flags are all set to 1, so all exceptions are masked. When
/// an exception is masked, the processor simply sets the exception flag and
/// continues the operation. If the exception is unmasked, the flag is also set
/// but additionally an exception handler is invoked.
///
/// * *Rounding mode flags* control the rounding mode of floating point
/// instructions.
/// instructions.
///
/// * The *denormals-are-zero mode flag* turns all numbers which would be
/// denormalized (exponent bits are all zeros) into zeros.
/// denormalized (exponent bits are all zeros) into zeros.
///
/// Note that modifying the masking flags, rounding mode, or denormals-are-zero mode flags leads to
/// **immediate Undefined Behavior**: Rust assumes that these are always in their default state and
Expand All @@ -1489,14 +1487,12 @@ pub unsafe fn _mm_getcsr() -> u32 {
/// * `_MM_EXCEPT_DIV_ZERO`: Division by zero occurred.
///
/// * `_MM_EXCEPT_OVERFLOW`: A numeric overflow exception occurred, i.e., a
/// result was too large to be represented (e.g., an `f32` with absolute
/// value
/// greater than `2^128`).
/// result was too large to be represented (e.g., an `f32` with absolute
/// value greater than `2^128`).
///
/// * `_MM_EXCEPT_UNDERFLOW`: A numeric underflow exception occurred, i.e., a
/// result was too small to be represented in a normalized way (e.g., an
/// `f32`
/// with absulte value smaller than `2^-126`.)
/// result was too small to be represented in a normalized way (e.g., an
/// `f32` with absolute value smaller than `2^-126`.)
///
/// * `_MM_EXCEPT_INEXACT`: An inexact-result exception occurred (a.k.a.
/// precision exception). This means some precision was lost due to rounding.
Expand Down Expand Up @@ -1829,7 +1825,7 @@ pub const _MM_HINT_ET1: i32 = 6;
/// * [`_MM_HINT_T1`](constant._MM_HINT_T1.html): Fetch into L2 and higher.
///
/// * [`_MM_HINT_T2`](constant._MM_HINT_T2.html): Fetch into L3 and higher or
/// an implementation-specific choice (e.g., L2 if there is no L3).
/// an implementation-specific choice (e.g., L2 if there is no L3).
///
/// * [`_MM_HINT_NTA`](constant._MM_HINT_NTA.html): Fetch data using the
/// non-temporal access (NTA) hint. It may be a place closer than main memory
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4 changes: 2 additions & 2 deletions crates/core_arch/src/x86/sse41.rs
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Expand Up @@ -242,14 +242,14 @@ pub unsafe fn _mm_extract_epi32<const IMM8: i32>(a: __m128i) -> i32 {
/// - `11`: Selects bits `[127:96]` from operand `b`.
///
/// * Bits `[5:4]` specify the bits in the result to which the selected bits
/// from operand `b` are copied:
/// from operand `b` are copied:
/// - `00`: Copies the selected bits from `b` to result bits `[31:0]`.
/// - `01`: Copies the selected bits from `b` to result bits `[63:32]`.
/// - `10`: Copies the selected bits from `b` to result bits `[95:64]`.
/// - `11`: Copies the selected bits from `b` to result bits `[127:96]`.
///
/// * Bits `[3:0]`: If any of these bits are set, the corresponding result
/// element is cleared.
/// element is cleared.
///
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_insert_ps)
#[inline]
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4 changes: 2 additions & 2 deletions crates/core_arch/src/x86_64/abm.rs
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Expand Up @@ -5,9 +5,9 @@
//! The references are:
//!
//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
//! Instruction Set Reference, A-Z][intel64_ref].
//! Instruction Set Reference, A-Z][intel64_ref].
//! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and
//! System Instructions][amd64_ref].
//! System Instructions][amd64_ref].
//!
//! [Wikipedia][wikipedia_bmi] provides a quick overview of the instructions
//! available.
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6 changes: 3 additions & 3 deletions crates/core_arch/src/x86_64/avx.rs
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Expand Up @@ -3,9 +3,9 @@
//! The references are:
//!
//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
//! Programmer's Manual, Volume 3: General-Purpose and System
//! Instructions][amd64_ref].
//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
//! Programmer's Manual, Volume 3: General-Purpose and System
//! Instructions][amd64_ref].
//!
//! [Wikipedia][wiki] provides a quick overview of the instructions available.
//!
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