add missing sct file

.gitignore

@@ -61,5 +61,4 @@ Pre_Include_*
 Objects
 example/mdk/EventRecorderStub.scvd
 example/mdk/DebugConfig/Pico_RP2040_Core0_1.0.0.dbgconf
-Device
 *.uvguix.*

CMSIS/Device/RP2040/Source/ARM/rp2040_no_flash.sct

@@ -0,0 +1,85 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m0 -xc
+; command above MUST be in first line (no comment above!)
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+#define FLASH_SIZE          0x00200000  
+#define SRAM_SIZE           (1024*248)
+
+#define STACK_0_SIZE        (1024*4)
+#define STACK_1_SIZE        (256)
+
+#define HEAP_0_SIZE         (1024*32)
+#define HEAP_1_SIZE         (256)
+
+#define RAMSIZE_VALID       (SRAM_SIZE -                                        \
+                            STACK_1_SIZE - HEAP_1_SIZE -                        \
+                            STACK_0_SIZE - HEAP_0_SIZE - 0x100)
+
+;LR_STAGE2_BOOT 0x10000000 0x100 {
+;    ER_STAGE2_BOOT +0 0x100 {
+;        compile_time_choice.o (+RO)
+;    }
+;    ER_FILL ImageLimit(ER_STAGE2_BOOT) FILL 0xDEADBEEF 0x100 - ImageLength(ER_STAGE2_BOOT) {
+;    }
+;}
+
+LR_IROM1 0x20000000 SRAM_SIZE  {    ; load region size_region
+
+    ER_BINRAY_INFO +0 {
+        * (:gdef:Reset_Handler)     //!< please always make sure that Reset_Handler is placed here.
+        * (.binary_info_header)
+    }
+
+    ER_RAM_VECTOR_TABLE +0 ALIGN 256 {
+        *  (.ram_vector_table)
+    }
+
+
+    ER_FLASH +0  {  ; load address = execution address
+        *.o (RESET, +First)
+        *(InRoot$$Sections)
+        * (+RO-DATA)
+        startup_RP2040.o (+RO)
+    }
+
+    ER_MUTEX_ARRAY +0 {
+        * (.mutex_array.*)
+        * (.mutex_array)
+    }
+
+    RW_IRAM_CODE +0 {
+        * (+RO-CODE)
+        * (+XO)
+    }
+
+    ARM_LIB_STACK +0 ALIGN 8  EMPTY STACK_0_SIZE {
+    }
+
+    ARM_LIB_STACK_ONE +0 ALIGN 8  EMPTY STACK_1_SIZE {
+    }
+    ARM_LIB_HEAP +0 ALIGN 8 EMPTY HEAP_0_SIZE  {
+    }
+    ARM_LIB_HEAP_ONE +0 ALIGN 8 EMPTY HEAP_1_SIZE  {
+    }
+
+
+
+    ;ER_PREINIT_ARRAY +0 {
+    ;    * (.preinit_array.*)
+    ;    * (.preinit_array)
+    ;}
+
+    RW_IRAM +0 {  ; RW data
+        .ANY (+RW +ZI)
+    }
+
+    RW_IRAM_UNINIT +0 UNINIT {
+        .ANY (.bss.noinit)
+    }
+
+
+
+}
+