Changed how TRAPNO 12 is triggered

ptitSeb · Jul 16, 2024 · 27c21f6 · 27c21f6
1 parent e14d8ab
commit 27c21f6
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/src/libtools/signals.c b/src/libtools/signals.c
@@ -607,12 +607,12 @@ void my_sigactionhandler_oldcode(int32_t sig, int simple, int Locks, siginfo_t*
             sigcontext->uc_mcontext.gregs[REG_TRAPNO] = ((info->si_code==SEGV_ACCERR) || (info->si_errno==0x1234) || ((uintptr_t)info->si_addr==0))?13:14;
         } else if((info->si_code==SEGV_ACCERR) && !(prot&PROT_WRITE)) {
             sigcontext->uc_mcontext.gregs[REG_ERR] = 0x0002;    // write flag issue
-            if(abs((intptr_t)info->si_addr-(intptr_t)sigcontext->uc_mcontext.gregs[REG_ESP])<8)
+            sigcontext->uc_mcontext.gregs[REG_TRAPNO] = 14;
+        } else {
+            if((info->si_code!=SEGV_ACCERR) && abs((intptr_t)info->si_addr-(intptr_t)sigcontext->uc_mcontext.gregs[REG_ESP])<8)
                 sigcontext->uc_mcontext.gregs[REG_TRAPNO] = 12; // stack overflow probably
             else
-                sigcontext->uc_mcontext.gregs[REG_TRAPNO] = 14;
-        } else {
-            sigcontext->uc_mcontext.gregs[REG_TRAPNO] = (info->si_code==SEGV_ACCERR)?13:14;
+                sigcontext->uc_mcontext.gregs[REG_TRAPNO] = (info->si_code==SEGV_ACCERR)?13:14;
             //REG_ERR seems to be INT:8 CODE:8. So for write access segfault it's 0x0002 For a read it's 0x0004 (and 8 for exec). For an int 2d it could be 0x2D01 for example
             sigcontext->uc_mcontext.gregs[REG_ERR] = 0x0004;    // read error? there is no execute control in box86 anyway, and no easy way to see if it's a write error
         }