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    11 repositories

    • pyslint

      Public
      SystemVerilog Linter based on pyslang
      SystemVerilog
      •
      MIT License
      •26•25•55•0•Updated Jan 6, 2025Jan 6, 2025

    • yoYoLint

      Public
      SystemVerilog RTL Linter for YoSys
      SystemVerilog
      •
      MIT License
      •6•18•31•2•Updated Nov 22, 2024Nov 22, 2024

    • verif_utils

      Public
      Verilog
      •
      MIT License
      •0•4•0•0•Updated Nov 5, 2024Nov 5, 2024

    • SVALint

      Public
      Linter for SystemVerilog Assertions (SVA). Following the philosophy of BYOL - Build Your Own Linter, SVALint is an example of ho users can roll out their own linters!
      SystemVerilog
      •4•6•13•0•Updated Oct 29, 2024Oct 29, 2024

    • FVLint

      Public
      Custom linter for Formal Verification using SVA
      3•3•8•3•Updated Oct 20, 2024Oct 20, 2024

    • benchbot

      Public
      A Python based VHDL app to improve productivity of VHDL designs
      VHDL
      •7•6•1•0•Updated Jun 14, 2024Jun 14, 2024

    • af_sva_apb

      Public
      AsFigo's opensource SVA IP for APB protocol + SVUnit tests on Verilator
      Verilog
      •
      MIT License
      •3•2•0•1•Updated Nov 30, 2023Nov 30, 2023

    • apb_uvc_verilator

      Public
      APB UVC ported to Verilator
      SystemVerilog
      •
      GNU General Public License v3.0
      •3•11•0•0•Updated Nov 19, 2023Nov 19, 2023

    • MathLib

      Public
      MathLib DAC 2023 version
      SystemVerilog
      •6•12•1•4•Updated Sep 11, 2023Sep 11, 2023

    • VHLD_parse

      Public
      A collection of Python scripts to make working with VHDL easier
      Python
      •
      MIT License
      •2•0•0•0•Updated Jun 20, 2023Jun 20, 2023

    • ivl_uvm

      Public
      Adding UVM support to Icarus Verilog (and Verilator in near future) by taking a step-by-step, bottom-up approach.
      SystemVerilog
      •39•23•4•1•Updated Dec 27, 2022Dec 27, 2022