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AXI-4 Protocol for AMO #2525
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Hi @Arhum-Ahmed, the AW and W channels are decoupled, and there are no requirements for ordering in AXI. See A3.4 of the AXI spec (issue K):
Where do you see the requirement for sequencing AW and W? |
Actually the problem occurs when I change the AMO's TB transaction behavior to sequenced communication (first using the AW channel, then the W channel). After making this change, I ran a test which had load-reserved/store-conditional (lr/sc) AMO instruction in it. On the sc-instruction, this change caused incorrect response from the B channel. The B.VALID arrived along with the AW.READY, which is against the spec (according to spec there should be a delay of at least one clock cycle). The way I'm sending request:
What might be the issue? CVA-6 AMO's TB Code for Reference:
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Hi,
I was testing the AMO instructions. I observed that in the axi adapter, communication on AW and W channels are being carried out simultaneously (in the same cycle). I also checked the TB of pulp repo and found the same interface there. But, according to the AXI-4 protocol specification, first the data should be written on AW channel and in the next cycle in the W channel. So, when I changed the interface, according to the specification, the tests started to hang. I wanted to know that is this interface implementation specific to this AMO only, or am I missing something?
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