doc: fem: nrf2220 add device guide for nrf2220

The guide for using nRF2220 device in NCS is added.

Signed-off-by: Andrzej Kuros <[email protected]>

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

@@ -0,0 +1,147 @@
+.. _ug_radio_fem_nrf2220:
+
+Enabling support for nRF2220
+############################
+
+The nRF2220 device is a range extender that you can use with nRF52, nRF53 and nrf54L Series devices.
+The nRF2220 features an GPIO and I2C interface.
+You can use it to fully control your front-end module.
+To use nRF2220, complete the following steps:
+
+1. Add the following node in the devicetree file:
+
+   .. code-block::
+
+      / {
+            nrf_radio_fem: name_of_fem_node {
+               compatible = "nordic,nrf2220-fem";
+               cs-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+               md-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+               twi-if = <&nrf_radio_fem_twi>;
+               output-power-dbm = <10>;
+         };
+      };
+
+#. Optionally replace the device name ``name_of_fem_node``.
+#. Replace the pin numbers provided for each of the required properties:
+
+   * ``cs-gpios`` - GPIO characteristic of the device that controls the ``CS`` signal of the nRF2220.
+   * ``md-gpios`` - GPIO characteristic of the device that controls the ``MD`` signal of the nRF2220.
+
+   These properties correspond to ``CS`` and ``MD`` pins of nRF2220 that are supported by software FEM.
+
+   The``phandle-array`` type is commonly used for describing GPIO signals in Zephyr's devicetree.
+   The first element ``&gpio1`` refers to the GPIO port ("port 1" has been selected in the example shown).
+   The second element is the pin number on that port.
+   The last element must be ``GPIO_ACTIVE_HIGH`` for nRF2220.
+
+#. Optionally set the value of the ``output-power-dbm`` property to a desired output power of nRF2220 that is to be used when power amplifier of the nRF2220 is used.
+   Allowed range is 7 to 14 dBm.
+   The nRF2220 device is configured through I2C on boot up to achieve given output power when the power amplifier of the nRF2220 is used.
+   The nRF2220 features also a built-in low-attenuation bypass circuit.
+   Either the bypass or power amplifier will be used when transmitting RF signals depending on requests made by a protocol driver.
+   The control of the output power of the SoC and decision to use either the bypass or the power amplifier occurs automatically.
+#. Add a following I2C bus device node on the devicetree file:
+
+   .. code-block:: devicetree
+
+      &pinctrl {
+            i2c0_default: i2c0_default {
+                  group1 {
+                        psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
+                                <NRF_PSEL(TWIM_SCL, 0, 27)>;
+                  };
+            };
+
+            i2c0_sleep: i2c0_sleep {
+                  group1 {
+                        psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
+                                <NRF_PSEL(TWIM_SCL, 0, 27)>;
+                        low-power-enable;
+                  };
+            };
+      };
+
+      fem_twi: &i2c0 {
+            status = "okay";
+            compatible = "nordic,nrf-twim";
+            pinctrl-0 = <&i2c0_default>;
+            pinctrl-1 = <&i2c0_sleep>;
+            pinctrl-names = "default", "sleep";
+
+            nrf_radio_fem_twi: nrf2220_fem_twi@36 {
+                  compatible = "nordic,nrf2220-fem-twi";
+                  status = "okay";
+                  reg = <0x36>;
+            };
+      };
+
+   In this example, the nRF2220 is controlled by the ``i2c0`` bus of the SoC and it's slave device address is ``0x36``.
+   Replace the I2C bus according to your hardware design, and create alternative entries for I2C with different ``pinctrl-N`` and ``pinctrl-names`` properties.
+#. The nRF2220 device supports alternative I2C slave address selection.
+   Instead of using the default ``0x36`` I2C slave address for nRF2220 device you can use the value ``0x34``.
+   In this case the alternative address selection procedure when switching from ``Power Off`` to ``Bypass`` states of the nRF2220 is used automatically as described by the nRF2220 Product Specification.
+#. On nRF53 devices, the devicetree nodes described above must be added to the network core and ``i2c0`` instance of the network core must be used.
+   For the application core, you must also add a GPIO forwarder node to its devicetree file to pass control over given pins from application core to the network core:
+
+   .. code-block:: devicetree
+
+      &gpio_fwd {
+         nrf2220-gpio-if {
+            gpios = <&gpio0 10 0>,   /* cs-gpios */
+                    <&gpio0 8 0>;    /* md-gpios */
+         };
+         nrf2220-twi-if {
+            gpios = <&gpio0 26 0>,   /* TWIM_SDA */
+                    <&gpio0 27 0>;   /* TWIM_SCL */
+         };
+      };
+
+   The pins defined in the GPIO forwarder node in the application core's devicetree file must match the pins defined in the FEM nodes in the network core's devicetree file.
+
+#. On nRF53 devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.
+   As a result, they cannot be used simultaneously.
+   For the I2C part of the nRF2220 interface to be functional, you must disable the ``UARTE0`` node in the network core's devicetree file.
+
+   .. code-block:: devicetree
+
+      &uart0 {
+         status = "disabled";
+      };
+
+#. On nRF54L devices the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` must support GPIOTE.
+   For example on nRF54L15 device only pins belonging to GPIO P1 or GPIO P0 can be used and GPIO P2 pins cannot be used due to lack of related GPIOTE peripheral.
+   It is recommended for mentioned purpose to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.
+   For example on nRF54L15 these are pins belonging to GPIO P1.
+   Using pins belonging to Low Power Power Domain (GPIO P0 on nRF54L15) is supported but requires more DPPI and PPIB channels of the SoC.
+   You must also enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:
+
+   .. code-block:: devicetree
+
+      &dppic10 {
+            status = "okay";
+      };
+
+      &ppib11 {
+            status = "okay";
+      };
+
+      &ppib21 {
+            status = "okay";
+      };
+
+      &dppic20 {
+            status = "okay";
+      };
+
+      &ppib22 {
+            status = "okay";
+      };
+
+      &ppib30 {
+            status = "okay";
+      };
+
+      &dppic30 {
+            status = "okay";
+      };

doc/nrf/app_dev/device_guides/fem/fem_software_support.rst

@@ -13,6 +13,10 @@ The following :term:`Front-End Module (FEM)` implementations are available in th
      - Interface
      - Compatible hardware
      - Documentation for hardware implementation
+   * - nRF2220
+     - 2-pin + I2C
+     - nRF2220
+     - :ref:`ug_radio_fem_nrf2220`
    * - nRF21540 GPIO+SPI
      - 3-pin + SPI
      - nRF21540
@@ -64,6 +68,7 @@ To use any of these implementations with your application, first complete the fo
    Refer to the chosen :ref:`documentation for hardware implementation <ug_radio_fem_hw_desc>` for details.
 #. Select the FEM driver implementation by setting one of the following Kconfig options to ``y`` for the chosen FEM support configuration:
 
+   * :ref:`nRF2220 <ug_radio_fem_nrf2220>`: :kconfig:option:`CONFIG_MPSL_FEM_NRF2220` Kconfig option.
    * :ref:`nRF21540 GPIO <ug_radio_fem_nrf21540_gpio>`: :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO` Kconfig option.
      This Kconfig option is enabled by default if the `nRF21540`_ node is provided in devicetree.
    * :ref:`nRF21540 GPIO+SPI <ug_radio_fem_nrf21540_spi_gpio>`: :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option.
@@ -79,6 +84,7 @@ If you are working with the nRF21540 EK, see also :ref:`ug_radio_fem_nrf21540ek`
    :caption: Subpages:
 
    fem_mpsl_fem_only
+   fem_nrf2220
    fem_nrf21540_gpio
    fem_nrf21540_gpio_spi
    fem_nRF21540_optional_properties