Skip to content

Commit

Permalink
review print_details() output
Browse files Browse the repository at this point in the history
- show TX address in `print_details()`
- fix IRQ settings' output
  • Loading branch information
2bndy5 committed Oct 29, 2024
1 parent ebda850 commit 667b80a
Show file tree
Hide file tree
Showing 2 changed files with 41 additions and 22 deletions.
62 changes: 40 additions & 22 deletions crates/rf24-rs/src/radio/rf24/details.rs
Original file line number Diff line number Diff line change
Expand Up @@ -89,19 +89,19 @@ where
self.get_status_flags(&mut flags);
defmt::println!(
"IRQ on Data Ready_________{=bool}",
self._config_reg & mnemonics::MASK_RX_DR > 0
(self._config_reg & mnemonics::MASK_RX_DR) == 0
);
defmt::println!(" Data Ready triggered__{=bool}", flags.rx_dr);
defmt::println!(
"IRQ on Data Fail__________{=bool}",
self._config_reg & mnemonics::MASK_MAX_RT > 0
);
defmt::println!(" Data Failed triggered_{=bool}", flags.tx_df);
defmt::println!(
"IRQ on Data Sent__________{=bool}",
self._config_reg & mnemonics::MASK_TX_DS > 0
(self._config_reg & mnemonics::MASK_TX_DS) == 0
);
defmt::println!(" Data Sent triggered___{=bool}", flags.tx_ds);
defmt::println!(
"IRQ on Data Fail__________{=bool}",
(self._config_reg & mnemonics::MASK_MAX_RT) == 0
);
defmt::println!(" Data Fail triggered___{=bool}", flags.tx_df);

let fifo = self.get_fifo_state(true)?;
defmt::println!("TX FIFO___________________{}", fifo);
Expand All @@ -118,32 +118,43 @@ where

self.spi_read(1, registers::EN_AA)?;
defmt::println!("Auto Acknowledgment_______0b{=0..8}", self._buf[1]);

let rx = defmt::intern!("R");
let tx = defmt::intern!("T");
defmt::println!(
"Primary Mode______________{}X",
if self._config_reg & 1 > 0 { "R" } else { "T" }
"Primary Mode______________{=istr}X",
if self._config_reg & 1 > 0 { rx } else { tx }
);
defmt::println!(
"Powered Up________________{=bool}",
self._config_reg & 2 > 0
);

// print pipe addresses
self.spi_read(5, registers::TX_ADDR)?;
let mut address = [0u8; 4];
address.copy_from_slice(&self._buf[2..6]);
address.reverse();
defmt::println!(
"TX address_____________{=[u8; 4]:#08X}{=u8:02X}",
address,
self._buf[1]
);
self.spi_read(1, registers::EN_RXADDR)?;
let open_pipes = self._buf[1];
let mut address = [0u8; 4];
let opened = defmt::intern!(" open ");
let closed = defmt::intern!("closed");
for pipe in 0..=5 {
self.spi_read(if pipe < 2 { 5 } else { 1 }, registers::RX_ADDR_P0 + pipe)?;
if pipe < 2 {
address.copy_from_slice(&self._buf[2..6]);
address.reverse();
}
defmt::println!(
"Pipe ({=str}) bound to {=[u8; 4]:08X}{=u8:02X}",
"Pipe ({=istr}) bound to {=[u8; 4]:#08X}{=u8:02X}",
if (open_pipes & (1u8 << pipe)) > 0 {
" open "
opened
} else {
"closed"
closed
},
// reverse the bytes read to represent how memory is stored
address,
Expand Down Expand Up @@ -213,19 +224,19 @@ where
self.get_status_flags(&mut flags);
std::println!(
"IRQ on Data Ready_________{}",
self._config_reg & mnemonics::MASK_RX_DR > 0
(self._config_reg & mnemonics::MASK_RX_DR) == 0
);
std::println!(" Data Ready triggered__{}", flags.rx_dr);
std::println!(
"IRQ on Data Fail__________{}",
self._config_reg & mnemonics::MASK_MAX_RT > 0
);
std::println!(" Data Failed triggered_{}", flags.tx_df);
std::println!(
"IRQ on Data Sent__________{}",
self._config_reg & mnemonics::MASK_TX_DS > 0
(self._config_reg & mnemonics::MASK_TX_DS) == 0
);
std::println!(" Data Sent triggered___{}", flags.tx_ds);
std::println!(
"IRQ on Data Fail__________{}",
(self._config_reg & mnemonics::MASK_MAX_RT) == 0
);
std::println!(" Data Fail triggered___{}", flags.tx_df);

let fifo = self.get_fifo_state(true)?;
std::println!("TX FIFO___________________{}", fifo);
Expand All @@ -250,9 +261,16 @@ where
std::println!("Powered Up________________{}", self._config_reg & 2 > 0);

// print pipe addresses
self.spi_read(5, registers::TX_ADDR)?;
let mut address = [0u8; 4];
address.copy_from_slice(&self._buf[2..6]);
std::println!(
"TX address_____________{:#08X}{:02X}",
u32::from_le_bytes(address),
self._buf[1]
);
self.spi_read(1, registers::EN_RXADDR)?;
let open_pipes = self._buf[1];
let mut address = [0u8; 4];
for pipe in 0..=5 {
self.spi_read(if pipe < 2 { 5 } else { 1 }, registers::RX_ADDR_P0 + pipe)?;
if pipe < 2 {
Expand Down
1 change: 1 addition & 0 deletions cspell.config.yml
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@ words:
- gpiod
- HLINE
- inlinehilite
- istr
- Kbps
- linenums
- maturin
Expand Down

0 comments on commit 667b80a

Please sign in to comment.