Add AIMer implementations(m4speed, m4stack) for all NIST security levels #361
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Sorry for the long delay! |
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Working on this now. Tracking progress:
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Could you allow me to make changes, so I can push the benchmarks, please? |
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Thank you for the updates.
In https://github.com/mupq/pqm4/tree/aimer, I can see the benchmarks are
updated.
If there are other things we can do to allow you to make changes, please
let me know.
2024년 10월 30일 (수) 오후 5:38, Matthias J. Kannwischer ***@***.***>님이
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… Could you allow me to make changes, so I can push the benchmarks, please?
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Merged
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Okay, I will add the benchmarks in a separate PR (#366) |
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This is Cortex-M4 optimized AIMer implementations for all NIST security levels.
'm4speed' implementations are focused on fastest operations considering the 640kB SRAM of Nucleo-l4r5zi board.
'm4stack' implementations are focused on smallest stack usage while using the same assembly field arithmetic implementations of 'm4speed'.
For assembly language implementations of field multiplication and squaring operations, we collaborated with Prof. Hwajeong Seo(@solowal).
Sangyub Lee
AIMer team