minor cleanup

bottom-board/PCB Source/bottom-board/audio-inputs.sch

@@ -48,10 +48,10 @@ P 2925 1345
 AR Path="/54F72B97/5F11DD8E" Ref="C?"  Part="1" 
 AR Path="/54F72C8D/5F11DD8E" Ref="C23"  Part="1" 
 F 0 "C23" H 2995 1370 50  0000 L CNN
-F 1 "100nF" H 2990 1290 50  0000 L CNN
+F 1 "100pF" H 2990 1290 50  0000 L CNN
 F 2 "Capacitor_SMD:C_0603_1608Metric" H 2925 1345 60  0001 C CNN
 F 3 "" H 2925 1345 60  0000 C CNN
-F 4 "GCM188R71C104KA37D" H -2375 -4005 50  0001 C CNN "MPN"
+F 4 "C0603C101J3GACTU" H -2375 -4005 50  0001 C CNN "MPN"
 	1    2925 1345
 	1    0    0    -1  
 $EndComp
@@ -644,10 +644,10 @@ P 2890 4515
 AR Path="/54F72B97/5F23421C" Ref="C?"  Part="1" 
 AR Path="/54F72C8D/5F23421C" Ref="C21"  Part="1" 
 F 0 "C21" H 2960 4540 50  0000 L CNN
-F 1 "100nF" H 2955 4460 50  0000 L CNN
+F 1 "100pF" H 2955 4460 50  0000 L CNN
 F 2 "Capacitor_SMD:C_0603_1608Metric" H 2890 4515 60  0001 C CNN
 F 3 "" H 2890 4515 60  0000 C CNN
-F 4 "GCM188R71C104KA37D" H -2410 -835 50  0001 C CNN "MPN"
+F 4 "C0603C101J3GACTU" H -2410 -835 50  0001 C CNN "MPN"
 	1    2890 4515
 	1    0    0    -1  
 $EndComp

bottom-board/PCB Source/bottom-board/bottom-board-cache.lib

@@ -21,6 +21,26 @@ X VDD 4 0 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# Power_Management_TPS2041B
+#
+DEF Power_Management_TPS2041B U 0 40 Y Y 1 F N
+F0 "U" 0 425 50 H V C CNN
+F1 "Power_Management_TPS2041B" 0 350 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 500 50 H I C CNN
+F3 "" -50 300 50 H I C CNN
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 300 300 -400 0 1 10 f
+X OUT 1 500 0 200 L 50 50 1 1 w
+X GND 2 0 -600 200 U 50 50 1 1 W
+X ~OC 3 -500 200 200 R 50 50 1 1 C
+X ~EN 4 -500 -200 200 R 50 50 1 1 I
+X IN 5 500 200 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # Regulator_Linear_LD1117S50TR_SOT223
 #
 DEF Regulator_Linear_LD1117S50TR_SOT223 U 0 10 Y Y 1 F N
@@ -1766,26 +1786,6 @@ X ~ 8 400 400 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# bottom-board-rescue_RT9701-Power_Management
-#
-DEF bottom-board-rescue_RT9701-Power_Management U 0 30 Y Y 1 F N
-F0 "U" 0 250 50 H V C CNN
-F1 "bottom-board-rescue_RT9701-Power_Management" 200 -150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -350 200 350 -100 0 1 10 f
-X VOUT 1 500 100 150 L 50 50 1 1 w
-X GND 2 0 -200 100 U 50 50 1 1 W
-X VIN 3 -500 100 150 R 50 50 1 1 W
-X VIN/EN 4 -500 0 150 R 50 50 1 1 I
-X VOUT 5 500 0 150 L 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
 # bottom-board-rescue_R_Small
 #
 DEF bottom-board-rescue_R_Small R 0 10 N N 1 F N

bottom-board/PCB Source/bottom-board/bottom-board.kicad_pcb

@@ -13193,7 +13193,7 @@
   (gr_line (start 179.83268 38.42788) (end 164.33268 38.42788) (layer Dwgs.User) (width 0.2))
   (gr_line (start 70.25768 124.05788) (end 70.10768 124.05788) (layer Dwgs.User) (width 0.2))
   (gr_line (start 135.65768 117.75788) (end 137.80768 117.75788) (layer Dwgs.User) (width 0.2))
-  (gr_text "MOD Devices GmbH\nhttp://moddevices.com\n\n[MDW-ELE-001]\nMOD Dwarf - Main Board \nRev.: MDW-PX30-V0.03\nDate: 2020.09.18" (at 244.76 117.31) (layer B.SilkS)
+  (gr_text "MOD Devices GmbH\nhttp://moddevices.com\n\n[MDW-ELE-001]\nMOD Dwarf - Main Board \nRev.: MDW-PX30-V1.00\nDate: 2020.12.23" (at 244.76 117.31) (layer B.SilkS)
     (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left mirror))
   )
   (gr_line (start 59.41 49.03) (end 59.41 127.83) (layer Edge.Cuts) (width 0.2))
@@ -17610,7 +17610,7 @@
   (segment (start 189.438232 45.95716) (end 190.770401 44.624991) (width 0.45) (layer F.Cu) (net 178))
   (segment (start 187.117838 45.95716) (end 189.438232 45.95716) (width 0.45) (layer F.Cu) (net 178))
 
-  (zone (net 64) (net_name GNDD) (layer F.Cu) (tstamp 5FE3A3E2) (hatch edge 0.508)
+  (zone (net 64) (net_name GNDD) (layer F.Cu) (tstamp 5FE3A400) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@@ -19388,7 +19388,7 @@
       )
     )
   )
-  (zone (net 64) (net_name GNDD) (layer B.Cu) (tstamp 5FE3A3DF) (hatch edge 0.508)
+  (zone (net 64) (net_name GNDD) (layer B.Cu) (tstamp 5FE3A3FD) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@@ -20569,7 +20569,7 @@
       )
     )
   )
-  (zone (net 1) (net_name GNDA) (layer B.Cu) (tstamp 5FE3A3DC) (hatch edge 0.508)
+  (zone (net 1) (net_name GNDA) (layer B.Cu) (tstamp 5FE3A3FA) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@@ -20628,7 +20628,7 @@
       )
     )
   )
-  (zone (net 3) (net_name +5V) (layer PWR-5VD.Cu) (tstamp 5FE3A3D9) (hatch edge 0.508)
+  (zone (net 3) (net_name +5V) (layer PWR-5VD.Cu) (tstamp 5FE3A3F7) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@@ -22984,7 +22984,7 @@
       )
     )
   )
-  (zone (net 64) (net_name GNDD) (layer GNDD.Cu) (tstamp 5FE3A3D6) (hatch edge 0.508)
+  (zone (net 64) (net_name GNDD) (layer GNDD.Cu) (tstamp 5FE3A3F4) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))