This repository contains a demonstration project for AD9117 devkit connected to [AFCK v1.1] FMC carrier board with AD-DAC-FMC-ADP adapter.
It is assumed that DCLKIO is connected together with CLKIN, so devkit clock tree is essentially not used.
Designed for 125 MHz clocking from fpga_clk
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This simplistic project generates a sine waves shifted by pi/4 at I/Q outputs. Period is 100 samples long, what results in output frequency of 1.25 MHz.
PYTHONPATH="$(pwd)/modules/migen:$PYTHONPATH" python3 ./gateware/top.py