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Fix compilation errors under riscv64 architecture
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Zeno-sole committed Mar 15, 2024
1 parent c3d07b3 commit 6506c1a
Showing 1 changed file with 4 additions and 6 deletions.
10 changes: 4 additions & 6 deletions src/co/context/arch.h
Original file line number Diff line number Diff line change
Expand Up @@ -54,15 +54,13 @@
#define ARCH_MIPS

#elif defined(loongarch) || \
defined(_loongarch) || \
defined(_loongarch64) || \
defined(__loongarch64) || \
defined(__loongarch__)
#define ARCH_LOONGARCH

#elif defined(riscv) || \
defined(_riscv) || \
defined(_riscv64) || \
defined(__riscv__)
defined(__riscv) || \
defined(__riscv_xlen)
#define ARCH_RISCV


Expand Down Expand Up @@ -129,7 +127,7 @@
defined(__ppc64__) || \
defined(__powerpc64__) || \
defined(__loongarch64) || \
defined(__riscv64) || \
defined(__riscv_xlen) || \
defined(_M_X64) || \
defined(_M_AMD64) || \
defined(_M_IA64) || \
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