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Fix constants throughout the code, add some comments. #5

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Fix constants throughout the code, add some comments. #5

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3 changes: 2 additions & 1 deletion firmware/include/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,8 @@
// PA13 - SWD_IO
#define DEBUG_GPIO_PORT GPIOF
#define DEBUG_GPIO_PIN GPIO_PIN_6
// PF7 - ???
#define MCU_RESET_CONFIG_PORT GPIOF
#define MCU_RESET_CONFIG_PIN GPIO_PIN_7

// PA14 - SWD_CLK
// PA15 - ???
Expand Down
10 changes: 7 additions & 3 deletions firmware/include/fpga.h
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Expand Up @@ -28,10 +28,14 @@ void fpga_power_off();

enum FPGA_BUFFER
{
FPGA_BUFFER_CMD = 0, // traffic on CMD line
FPGA_BUFFER_CMD_DATA = 1, // data from host-->device commands
FPGA_BUFFER_RESP_DATA = 2, // data from device-->host responses
FPGA_BUFFER_CMD = 0, // 512B, traffic on CMD line
FPGA_BUFFER_CMD_DATA = 1, // 512B, data from host-->device commands, also toolkit comms
FPGA_BUFFER_RESP_DATA = 2, // 512B, data from device-->host responses
};
// A word on buffer sizing (implied by the code):
// 0 - 7 (mmc.c), 32 (mmc.c), 512 (glitch.c)
// 1 - 512 (mmc.c), 512 (glitch.c)
// 2 - 512 (glitch.c)

void fpga_select_active_buffer(enum FPGA_BUFFER buffer);
void fpga_reset_device(int do_clock_stuck_glitch);
Expand Down
7 changes: 4 additions & 3 deletions firmware/src/adc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
*/

#include <gd32f3x0.h>
#include <board.h>
#include <adc.h>
#include <fpga.h>
#include <delay.h>
Expand Down Expand Up @@ -53,21 +54,21 @@ int init_device_specific_adc(enum DEVICE_TYPE dt, struct adc_param *pap)
{
if (dt == DEVICE_TYPE_ERISTA)
{
adc_init(GPIOB, GPIO_PIN_0, 8);
adc_init(SWITCH_ERISTA_ADC_GPIO_PORT, SWITCH_ERISTA_ADC_GPIO_PIN, 8);
pap->poweron_threshold = 1200;
pap->glitch_threshold = 1376;
return 0;
}
if (dt == DEVICE_TYPE_MARIKO)
{
adc_init(GPIOB, GPIO_PIN_1, 9);
adc_init(SWITCH_MARIKO_ADC_GPIO_PORT, SWITCH_MARIKO_ADC_GPIO_PIN, 9);
pap->poweron_threshold = 1024;
pap->glitch_threshold = 1296;
return 0;
}
if (dt == DEVICE_TYPE_LITE)
{
adc_init(GPIOA, GPIO_PIN_2, 2);
adc_init(SWITCH_LITE_ADC_GPIO_PORT, SWITCH_LITE_ADC_GPIO_PIN, 2);
pap->poweron_threshold = 1024;
pap->glitch_threshold = 1270;
return 0;
Expand Down
6 changes: 3 additions & 3 deletions firmware/src/debug.c
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Original file line number Diff line number Diff line change
Expand Up @@ -294,15 +294,15 @@ void debug_main(struct bootloader_usb *usb)
do
{
fpga_pre_recv();
fpga_select_active_buffer(1);
fpga_select_active_buffer(FPGA_BUFFER_CMD_DATA);
fpga_read_buffer(recv_buffer, sizeof(recv_buffer));
fpga_post_recv();
dbglog("# Got command: %x %x %x\n", recv_buffer[0], recv_buffer[1], recv_buffer[2]);
if (recv_buffer[0] != 0xAA)
{
resp_buffer[0] = ~recv_buffer[0];
*(uint32_t *) &resp_buffer[1] = 0x70000000;
fpga_select_active_buffer(1);
fpga_select_active_buffer(FPGA_BUFFER_CMD_DATA);
fpga_write_buffer(resp_buffer, sizeof(resp_buffer));
fpga_post_send();
}
Expand Down Expand Up @@ -457,4 +457,4 @@ void debug_main(struct bootloader_usb *usb)
break;
}
}
}
}
40 changes: 34 additions & 6 deletions firmware/src/fpga.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,13 +31,13 @@ void fpga_init_spi(int prescale)
spi_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
spi_struct.device_mode = SPI_MASTER;
spi_struct.frame_size = SPI_FRAMESIZE_8BIT;
spi_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
spi_struct.nss = SPI_NSS_SOFT;
spi_struct.prescale = prescale;
spi_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE; // idle is high, pick up at posedge
spi_struct.nss = SPI_NSS_SOFT; // possibly: we control the slave select manually
spi_struct.prescale = prescale; // fpga_reset(): div by 4 (SPI_PSC_4), fpga_init() div by 2 (SPI_PSC_2)
spi_struct.endian = SPI_ENDIAN_MSB;
spi_i2s_deinit(SPI0);
spi_init(SPI0, &spi_struct);
spi_ti_mode_disable(SPI0);
spi_ti_mode_disable(SPI0); // slave select (SS) pin is low the entire time we transmit
spi_enable(SPI0);
}

Expand Down Expand Up @@ -65,21 +65,23 @@ void fpga_init()
gpio_mode_set(FPGA_CS_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, FPGA_CS_GPIO_PIN);
}

// spin as long as we're transmitting in background, then deselect SS (pull high)
void gpioa_set_pin4()
{
while (SPI_STAT(SPI0) & SPI_STAT_TRANS)
;
gpio_bit_set(FPGA_CS_GPIO_PORT, FPGA_CS_GPIO_PIN);
}

// select SS (pull low); before start of SPI transfer
void gpioa_clear_pin4()
{
gpio_bit_reset(FPGA_CS_GPIO_PORT, FPGA_CS_GPIO_PIN);
}

uint32_t fpga_reset()
{
fpga_init_spi(8);
fpga_init_spi(8); // SPI_PSC_4 (XXX: weird!)

gpio_bit_reset(FPGA_PWR_EN_PORT, FPGA_PWR_EN_PIN);
gpioa_set_pin4();
Expand All @@ -97,6 +99,7 @@ void fpga_power_off()
gpio_bit_reset(FPGA_PWR_EN_PORT, FPGA_PWR_EN_PIN);
}

// send len bytes, ignoring any received data
void spi0_send(uint8_t *buf, int len)
{
for (int i = 0; i < len; i++)
Expand All @@ -108,6 +111,7 @@ void spi0_send(uint8_t *buf, int len)
while ((SPI_STAT(SPI0) & (SPI_STAT_TRANS | SPI_STAT_TBE | SPI_STAT_RBNE)) != SPI_STAT_TBE);
}

// send len bytes, rewriting the buf with received data
void spi0_spi_transfer_buffer(uint8_t *buf, int len)
{
for (int i = 0; i < len; i++)
Expand All @@ -119,6 +123,7 @@ void spi0_spi_transfer_buffer(uint8_t *buf, int len)
while ((SPI_STAT(SPI0) & (SPI_STAT_TRANS | SPI_STAT_TBE | SPI_STAT_RBNE)) != SPI_STAT_TBE);
}

// send {0x24, subcmd, value}
void transfer_spi0_24_byte(uint8_t subcmd, uint8_t value)
{
uint8_t buf[3];
Expand All @@ -132,6 +137,7 @@ void transfer_spi0_24_byte(uint8_t subcmd, uint8_t value)
gpioa_set_pin4();
}

// send {0x24, subcmd, value0, value1}
void transfer_spi0_24_word(uint8_t subcmd, uint16_t value)
{
uint8_t buf[4];
Expand All @@ -146,6 +152,7 @@ void transfer_spi0_24_word(uint8_t subcmd, uint16_t value)
gpioa_set_pin4();
}

// send {0x26, subcmd}, return buf[2]
uint8_t transfer_spi0_26_byte(uint8_t subcmd)
{
uint8_t buf[3];
Expand All @@ -157,16 +164,26 @@ uint8_t transfer_spi0_26_byte(uint8_t subcmd)
return buf[2];
}

// send {0x24, 0x6, value}
void transfer_spi0_24_6(uint8_t value)
{
transfer_spi0_24_byte(0x6, value);
}

// send {0x24, 0x5, buffer}
// fpga.h says:
// FPGA_BUFFER_CMD = 0, // traffic on CMD line
// FPGA_BUFFER_CMD_DATA = 1, // data from host-->device commands, also toolkit comms
// FPGA_BUFFER_RESP_DATA = 2, // data from device-->host responses
void fpga_select_active_buffer(enum FPGA_BUFFER buffer)
{
transfer_spi0_24_byte(0x5, buffer);
}

// send bunch of {0x24, 6, ...}
//
// do_clock_stuck_glitch is IMO incorrect. It forces CMD line low for about 2s,
// which gets the BPSP somehow stuck.
void fpga_reset_device(int do_clock_stuck_glitch)
{
transfer_spi0_24_6(0x80);
Expand All @@ -182,6 +199,7 @@ void fpga_reset_device(int do_clock_stuck_glitch)
}
}

// send bunch of {0x24, 0x[12368], ...}
void fpga_glitch_device(glitch_cfg_t *cfg)
{
transfer_spi0_24_6(0);
Expand All @@ -194,16 +212,19 @@ void fpga_glitch_device(glitch_cfg_t *cfg)
transfer_spi0_24_6(0x10);
}

// send {0x26, 0xA}, read back one byte
uint8_t fpga_read_glitch_flags()
{
return transfer_spi0_26_byte(0xA);
}

// send {0x26, 0xB}, read back one byte
uint8_t fpga_read_mmc_flags()
{
return transfer_spi0_26_byte(0xB);
}

// send {0xEE, 0x00, 0x00, 0x00, 0x00}, read back four bytes as the FPGA id
uint32_t fpga_read_type()
{
uint8_t buf[5];
Expand All @@ -216,6 +237,7 @@ uint32_t fpga_read_type()
return res;
}

// send {0x54}
void fpga_do_mmc_command()
{
uint8_t cmd = 0x54;
Expand All @@ -224,6 +246,7 @@ void fpga_do_mmc_command()
gpioa_set_pin4();
}

// send {0xBA}, then read size into the buffer
void fpga_read_buffer(uint8_t *buffer, uint32_t size)
{
uint8_t cmd = 0xBA;
Expand All @@ -233,6 +256,7 @@ void fpga_read_buffer(uint8_t *buffer, uint32_t size)
gpioa_set_pin4();
}

// send {0xBC}, then write size from the buffer
void fpga_write_buffer(uint8_t *buffer, uint32_t size)
{
uint8_t cmd = 0xBC;
Expand All @@ -242,23 +266,27 @@ void fpga_write_buffer(uint8_t *buffer, uint32_t size)
gpioa_set_pin4();
}

// send {0x24, 0x6, 0x4} then {0x24, 0x6, 0x1}
void fpga_enter_cmd_mode()
{
transfer_spi0_24_6(4);
transfer_spi0_24_6(1);
}

// spinloop send {0x26, 0xB} until FPGA_MMC_BUSY_LOADER_DATA_RCVD clears
void fpga_pre_recv()
{
while (!(fpga_read_mmc_flags() & FPGA_MMC_BUSY_LOADER_DATA_RCVD));
}

// send {0x24, 0x6, 5}
void fpga_post_recv()
{
transfer_spi0_24_6(5);
}

// send {0x24, 0x6, 3}
void fpga_post_send()
{
transfer_spi0_24_6(3);
}
}
8 changes: 4 additions & 4 deletions firmware/src/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -68,14 +68,14 @@ void firmware_main()

while (1)
{
gpio_mode_set(GPIOF, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, BIT(7));
gpio_mode_set(MCU_RESET_CONFIG_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, MCU_RESET_CONFIG_PIN);
delay_ms(5u);
int pinWhilePulledUp = gpio_input_bit_get(GPIOF, BIT(7));
int pinWhilePulledUp = gpio_input_bit_get(MCU_RESET_CONFIG_PORT, MCU_RESET_CONFIG_PIN);

// configure GPIO to input with pull-down
gpio_mode_set(GPIOF, GPIO_MODE_INPUT, GPIO_PUPD_PULLDOWN, BIT(7));
gpio_mode_set(MCU_RESET_CONFIG_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLDOWN, MCU_RESET_CONFIG_PIN);
delay_ms(5u);
int pinWhilePulledDown = gpio_input_bit_get(GPIOF, BIT(7));
int pinWhilePulledDown = gpio_input_bit_get(MCU_RESET_CONFIG_PORT, MCU_RESET_CONFIG_PIN);

if (pinWhilePulledDown && pinWhilePulledUp && syncAttempt < 95)
{
Expand Down
14 changes: 7 additions & 7 deletions firmware/src/mmc.c
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Expand Up @@ -58,7 +58,7 @@ int mmc_send_command(uint32_t cmd, uint32_t argument, uint32_t *res, uint8_t *io
data[6] = 5;
if (io)
{
fpga_select_active_buffer(1);
fpga_select_active_buffer(FPGA_BUFFER_CMD_DATA);
fpga_write_buffer(io, 512);
}
break;
Expand All @@ -69,19 +69,19 @@ int mmc_send_command(uint32_t cmd, uint32_t argument, uint32_t *res, uint8_t *io
break;
}

fpga_select_active_buffer(0);
fpga_select_active_buffer(FPGA_BUFFER_CMD);
fpga_write_buffer(data, 7);
fpga_do_mmc_command();

int retry = 2000;
while (fpga_read_mmc_flags() & 1)
while (fpga_read_mmc_flags() & FPGA_MMC_BUSY_SENDING)
{
if (!--retry)
return -1;
delay_us(50);
}

fpga_select_active_buffer(0);
fpga_select_active_buffer(FPGA_BUFFER_CMD);
uint8_t tmp[32];
fpga_read_buffer(tmp, 32);

Expand All @@ -94,9 +94,9 @@ int mmc_send_command(uint32_t cmd, uint32_t argument, uint32_t *res, uint8_t *io
*res = __builtin_bswap32(*(uint32_t *) &tmp[1]);
}

if (cmd == 17 && io)
if (cmd == MMC_READ_SINGLE_BLOCK && io)
{
fpga_select_active_buffer(1);
fpga_select_active_buffer(FPGA_BUFFER_CMD_DATA);
fpga_read_buffer(io, 512);
}

Expand Down Expand Up @@ -281,4 +281,4 @@ uint32_t mmc_erase(uint32_t offset, uint32_t len)
}

return 0;
}
}