There remain only two known issues. The first is that the read-modify-write cycle is not honoured for TT-RAM and the second is that a reset causes the SDRAM controller to re-initialise which may lose memory during the period in which there are no refreshes.
There is another limitation with this release which is that whilst it supports either a 512k or 1M Flash chip, only a maximum of 512k is currently useable.
These are considered minor enough a drawbacks for me to name this version 1.0.