Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

temp #32

Open
wants to merge 28 commits into
base: develop23
Choose a base branch
from
Open

temp #32

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
28 commits
Select commit Hold shift + click to select a range
d011ada
mem-DRAM-cache-with-stdlib
mbabaie Oct 3, 2023
3d94b88
merge conflicts resolved
mbabaie Oct 3, 2023
344160f
tested fs
mbabaie Oct 3, 2023
09e9b5f
Removed importing old RubySystem
mbabaie Oct 10, 2023
ef68c0a
mem: revert the last 2 commits with stats changes
mbabaie Oct 22, 2023
e7fda6e
fixed the repetitive req sent by traff gen
mbabaie Oct 23, 2023
6859ad2
fixed the stats pointer issue
mbabaie Oct 23, 2023
19d7764
fixed some stats
mbabaie Oct 26, 2023
264d4ae
added new stats
mbabaie Oct 27, 2023
1cff883
fixed a stat
mbabaie Oct 27, 2023
5a61397
new configs for 8 chnnels of HBM
mbabaie Oct 27, 2023
b8c5dfb
configs: Jason's changes
powerjg Oct 27, 2023
f5f3986
some updates to the configs
mbabaie Oct 27, 2023
e332ba5
small update to the path of disk image
mbabaie Oct 28, 2023
2062611
unified the scripts for gapbs and npb
mbabaie Oct 29, 2023
126e158
fixed the checkpoint Ruby flush issue and tested chkpts and rstrs worked
mbabaie Nov 2, 2023
06a7687
unified scripts for multi channel checkpoints tested, restore not tes…
mbabaie Nov 5, 2023
91408e4
tested cpt and rstr worked, updated: serialize name and entry bug, ad…
mbabaie Nov 6, 2023
23b497e
modified the DRAM cache code and the scripts for atomic
mbabaie Nov 8, 2023
2610d6a
fixed the memory range issue and made the main memory single channel
mbabaie Nov 10, 2023
b8f7f0f
fixed the packet size in tag and index calc and made main mem size sp…
mbabaie Nov 12, 2023
8638ba6
fixed the main mem size line in the scripts for the dictionary to rea…
mbabaie Nov 12, 2023
81cbe2a
added a check point directory for restore
mbabaie Nov 13, 2023
295c726
aligned addresses to block size when the packet size is less than blo…
mbabaie Nov 14, 2023
1f1d6b1
fixed the address alignment tag check + added benchmark/size for chec…
mbabaie Nov 14, 2023
77a5276
collected pc-count and updated scripts with them
mbabaie Nov 15, 2023
e4de8ad
fixed serial/unserialization for set-associativity
mbabaie Nov 30, 2023
943106e
fixed standard library so it has updated TDRAM, previoulsy had the ol…
mbabaie Nov 30, 2023
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions build_opts/RISCV_MESI_Three_Level
Original file line number Diff line number Diff line change
@@ -0,0 +1,2 @@
USE_RISCV_ISA = True
PROTOCOL = 'MESI_Three_Level'
61 changes: 61 additions & 0 deletions configs-drtrace/drtrace.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,61 @@
# -*- coding: utf-8 -*-
# Copyright (c) 2019 The Regents of the University of California.
# All rights reserved.
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Jason Lowe-Power, Ayaz Akram


import argparse
import time
import m5
import m5.ticks
from m5.objects import *

from system import *

supported_protocols = ["MESI_Two_Level"]

def parse_options():

parser = argparse.ArgumentParser(description='For use with gem5.')

parser.add_argument("num_cpus", type=int, help="Number of CPU cores")
parser.add_argument("workload", help="The google trace workload to run")

return parser.parse_args()

if __name__ == "__m5_main__":
args = parse_options()

# create the system we are going to simulate
system = MyRubySystem("MESI_Two_Level", args.num_cpus, args)

# set up the root SimObject and start the simulation
root = Root(full_system = True, system = system)

# instantiate all of the objects we've created above
m5.instantiate()

exit_event = m5.simulate(1000*1000000)
88 changes: 88 additions & 0 deletions configs-drtrace/drtrace_new.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,88 @@
import m5
import argparse
from m5.objects import *
from system import *

"""
Usage:
------

```
./build/X86/gem5.opt \
drtrace.py \
--path <path of folder containing all traces> \
--workload <benchmark_name> \
--players <Number of players to use> \
--dram <DRAM device to use>
```
"""

parser = argparse.ArgumentParser(
description="A script to run google traces."
)

benchmark_choices = ["charlie", "delta", "merced", "whiskey"]

parser.add_argument(
"path",
type=str,
help="Main directory containing the traces.",
)

parser.add_argument(
"workload",
type=str,
help="Input the benchmark program to execute.",
choices=benchmark_choices,
)

parser.add_argument(
"players",
type=int,
help="Input the number of players to use.",
)

parser.add_argument(
"dcache_policy",
type=str,
help="The architecture of DRAM cache: "
"CascadeLakeNoPartWrs, Oracle, BearWriteOpt, Rambus",
)
parser.add_argument(
"assoc",
type=int,
help="THe associativity of the DRAM cache",
)
parser.add_argument(
"dcache_size",
type=str,
help="The size of DRAM cache",
)
parser.add_argument(
"main_mem_size",
type=str,
help="The size of main memory",
)
parser.add_argument(
"is_link",
type=int,
help="whether to use a link for backing store or not",
)
parser.add_argument(
"link_lat",
type=str,
help="latency of the link to backing store"
)

args = parser.parse_args()

#system = System()
system = MyRubySystem("MESI_Two_Level", args.players, args.assoc, args.dcache_size, args.main_mem_size, args.dcache_policy, args.is_link, args.link_lat, args)

root = Root(full_system=True, system=system)

m5.instantiate()

print("Beginning simulation!")
exit_event = m5.simulate(100000000000)
print(f"Exiting @ tick {m5.curTick()} because {exit_event.getCause()}")
Loading