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Wreal models of analog circuit components (verilog ams)

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Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
adc		adc
filters		filters
pll		pll
.gitignore		.gitignore
README.md		README.md

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analog_models

Wreal models of analog circuit components (verilog ams)

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Wreal models of analog circuit components (verilog ams)

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