riscv: make timer precision default to 0

Align RISC-V with ARM behavior Signed-off-by: Axel Heider <[email protected]>
axel-h · Dec 1, 2023 · d344043 · d344043
1 parent 7635d90
commit d344043
Showing 1 changed file with 0 additions and 4 deletions.
diff --git a/include/arch/riscv/arch/machine/timer.h b/include/arch/riscv/arch/machine/timer.h
@@ -13,10 +13,6 @@
 #include <arch/sbi.h>
 #include <arch/machine/hardware.h>
 
-#ifndef CONFIGURE_TIMER_PRECISION
-#define CONFIGURE_TIMER_PRECISION   1
-#endif
-
 /* The scheduler clock is greater than 1MHz */
 #define TICKS_IN_US (TIMER_CLOCK_HZ / (US_IN_MS * MS_IN_S))