risc-v: put trap vector at the start of kernel image

Debugging improvements: 
- Mark the trap handler as a function, so it's not just an arbitrary
  symbol for the linker.
- Force trap entry to be at the start of the kernel runtime image, so
  the linker does not put it at arbitrary locations. Page alignment is
  not required on RISC-V for the vector base address, 4-byte alignment
  is enough.

Signed-off-by: Axel Heider <[email protected]>

src/arch/riscv/common_riscv.lds

@@ -39,10 +39,8 @@ SECTIONS
 
     .text . : AT(ADDR(.text) - KERNEL_OFFSET)
     {
-        . = ALIGN(4K);
-
-
-        /* Standard kernel */
+        /* runtime kernel */
+        *(.vectors)
         *(.text)
     }
 

src/arch/riscv/traps.S

@@ -14,16 +14,14 @@
 
 #define REGBYTES (CONFIG_WORD_SIZE / 8)
 
-.section .text
-
-.global trap_entry
 .extern c_handle_syscall
 .extern c_handle_fastpath_reply_recv
 .extern c_handle_fastpath_call
 .extern c_handle_interrupt
 .extern c_handle_exception
 
-trap_entry:
+.section .vectors, "ax"
+BEGIN_FUNC(trap_entry)
 
 #ifdef ENABLE_SMP_SUPPORT
 /* The sscratch contains the stack for the current core */
@@ -137,3 +135,5 @@ interrupt:
   /* Save NextIP */
   STORE   x1, (34*REGBYTES)(t0)
   j c_handle_interrupt
+
+END_FUNC(trap_entry)