Skip to content

Commit

Permalink
python: cleanup and rework functions
Browse files Browse the repository at this point in the history
this is used only once in a specific context,
so we can simplify things a lot...
  • Loading branch information
axel-h committed Jan 26, 2024
1 parent 7e18bb0 commit 49e800f
Show file tree
Hide file tree
Showing 3 changed files with 29 additions and 41 deletions.
19 changes: 15 additions & 4 deletions tools/hardware/config.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@
#

from __future__ import annotations
import hardware
from hardware.memory import Region


Expand Down Expand Up @@ -52,10 +53,16 @@ def align_memory(self, regions: Set[Region]) -> (List[Region], Set[Region], int)

# kernel is in the first region
reg = regions[0]
reg_aligned = reg.align_base(self.SUPERSECTION_BITS)
regions[0] = reg_aligned
physBase = reg_aligned.base
extra_reserved.add(Region(reg.base, reg_aligned.base - reg.base))
physBase = hardware.utils.align_up(reg.base, self.SUPERSECTION_BITS)
diff = physBase - reg.base
if diff > reg.size:
raise ValueError(
'can\'t cut off {} from start, region size is only {}'.format(
diff, reg.size))
if (diff > 0):
extra_reserved.add(Region(reg.base, diff))
reg.base = physBase
reg.size -= diff

return regions, extra_reserved, physBase

Expand All @@ -81,6 +88,10 @@ def align_memory(self, regions: Set[Region]) -> (List[Region], Set[Region], int)
physBase = reg.base
# reserve space for bootloader in the region
len_bootloader_reserved = 1 << self.MEGAPAGE_BITS_RV64
if len_bootloader_reserved > reg.size:
raise ValueError(
'can\'t cut off {} from start, region size is only {}'.format(
len_bootloader_reserved, reg.size))
extra_reserved.add(Region(reg.base, len_bootloader_reserved))
reg.base += len_bootloader_reserved
reg.size -= len_bootloader_reserved
Expand Down
30 changes: 0 additions & 30 deletions tools/hardware/memory.py
Original file line number Diff line number Diff line change
Expand Up @@ -87,33 +87,3 @@ def reserve(self, excluded: Region) -> List[Region]:
ret.append(Region.from_range(excluded.base + excluded.size,
self.base + self.size, self.owner))
return ret

def align_base(self, align_bits: int) -> Region:
''' align this region up to a given number of bits '''
new_base = hardware.utils.align_up(self.base, align_bits)
diff = new_base - self.base
if self.size < diff:
raise ValueError(
'can''t align region base to {} bits, {} too small'.format(
align_bits, self))
# This could become an empty region now. We don't care, the caller has
# to check if this region still fits its needs.
return Region(new_base, self.size - diff, self.owner)

def align_size(self, align_bits: int) -> Region:
''' align this region's size to a given number of bits.
will move the base address down and the region's size
up '''
new_base = hardware.utils.align_down(self.base, align_bits)
new_size = hardware.utils.align_up(self.size, align_bits)
return Region(new_base, new_size, self.owner)

def make_chunks(self, chunksz: int) -> List[Region]:
base = self.base
size = self.size
ret = []
while size > 0:
ret.append(Region(base, min(size, chunksz), self.owner))
base += chunksz
size -= chunksz
return ret
21 changes: 14 additions & 7 deletions tools/hardware/utils/rule.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
from collections import defaultdict
from functools import lru_cache
import logging
import hardware
from hardware.config import Config
from hardware.device import WrappedNode
from hardware.fdt import FdtParser
Expand Down Expand Up @@ -42,13 +43,19 @@ def __init__(self, region: Region, kernel_name: str, page_bits: int, max_size: i
self.page_bits = page_bits
self.labels = {} # dict of label => offset within region.
self.user_ok = user_ok

region.size = min(max_size, region.size)
aligned = region.align_size(page_bits)
self.size = aligned.size
self.base = aligned.base
self.regions = aligned.make_chunks(1 << page_bits)
self.labels[kernel_name] = region.base - aligned.base
# the kernel region covers full pages
self.base = hardware.utils.align_down(region.base, page_bits)
# The maximum size must be properly aligned
if 0 != max_size % (1 << page_bits):
raise ValueError('max_size {} is not {}-bit aligned'.format(
max_size, page_bits))
self.size = min(max_size, hardware.utils.align_up(region.size, page_bits))
self.labels[kernel_name] = region.base - self.base
# Build a list with all pages
self.regions = [
Region(page_base, 1 << page_bits, region.owner)
for page_base in range(self.base, self.base + self.size, 1 << page_bits)
]

def has_macro(self):
''' True if this group has a macro '''
Expand Down

0 comments on commit 49e800f

Please sign in to comment.