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| <table class="memberdecls"> | ||
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a> | ||
| Data Structures</h2></td></tr> | ||
| <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structfilter__design__parameters.html">filter_design_parameters</a></td></tr> | ||
| <tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Custom Filter Design Parameters. <a href="structfilter__design__parameters.html#details">More...</a><br /></td></tr> | ||
| <tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> | ||
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| Macros</h2></td></tr> | ||
| <tr class="memitem:ga66ac32506b327f7e405736fb48b17a1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__FLAGS.html#ga66ac32506b327f7e405736fb48b17a1e">FIXUP_INTERFACE_TIMING</a>   1</td></tr> | ||
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| <tr class="memitem:ga1f85cd7b8f3e7316d531375ce37792e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__FLAGS.html#ga1f85cd7b8f3e7316d531375ce37792e2">CHECK_SAMPLE_RATES</a>   2</td></tr> | ||
| <tr class="separator:ga1f85cd7b8f3e7316d531375ce37792e2"><td class="memSeparator" colspan="2"> </td></tr> | ||
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| Functions</h2></td></tr> | ||
| <tr class="memitem:ga02f886c4f51656d4ba7eb14cc4c45260"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga02f886c4f51656d4ba7eb14cc4c45260">ad9361_multichip_sync</a> (struct iio_device *master, struct iio_device **slaves, unsigned int num_slaves, unsigned int flags)</td></tr> | ||
| <tr class="memdesc:ga02f886c4f51656d4ba7eb14cc4c45260"><td class="mdescLeft"> </td><td class="mdescRight">Multi-chip synchronization (MCS) management. <a href="group__TopLevel.html#ga02f886c4f51656d4ba7eb14cc4c45260">More...</a><br /></td></tr> | ||
| <tr class="separator:ga02f886c4f51656d4ba7eb14cc4c45260"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga8397091642a76a1e7896cbceaa4ac7fc"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga8397091642a76a1e7896cbceaa4ac7fc">ad9361_fmcomms5_multichip_sync</a> (struct iio_context *ctx, unsigned int flags)</td></tr> | ||
| <tr class="memdesc:ga8397091642a76a1e7896cbceaa4ac7fc"><td class="mdescLeft"> </td><td class="mdescRight">FMComms5 specific MCS management. <a href="group__TopLevel.html#ga8397091642a76a1e7896cbceaa4ac7fc">More...</a><br /></td></tr> | ||
| <tr class="separator:ga8397091642a76a1e7896cbceaa4ac7fc"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga56c31cc700d410be9bdeea3040e62eb3"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga56c31cc700d410be9bdeea3040e62eb3">ad9361_set_bb_rate</a> (struct iio_device *dev, unsigned long rate)</td></tr> | ||
| <tr class="memdesc:ga56c31cc700d410be9bdeea3040e62eb3"><td class="mdescLeft"> </td><td class="mdescRight">Baseband rate configuration with generic filter support. <a href="group__TopLevel.html#ga56c31cc700d410be9bdeea3040e62eb3">More...</a><br /></td></tr> | ||
| <tr class="separator:ga56c31cc700d410be9bdeea3040e62eb3"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga45ccd7e395de4080c7d6b76a46f1bee5"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga45ccd7e395de4080c7d6b76a46f1bee5">ad9361_set_trx_fir_enable</a> (struct iio_device *dev, int enable)</td></tr> | ||
| <tr class="memdesc:ga45ccd7e395de4080c7d6b76a46f1bee5"><td class="mdescLeft"> </td><td class="mdescRight">Enable or disable transmit and receiver FIRs simultaneously. <a href="group__TopLevel.html#ga45ccd7e395de4080c7d6b76a46f1bee5">More...</a><br /></td></tr> | ||
| <tr class="separator:ga45ccd7e395de4080c7d6b76a46f1bee5"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga8c0aa6b86ce0fe5a4d56034f691994ed"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga8c0aa6b86ce0fe5a4d56034f691994ed">ad9361_get_trx_fir_enable</a> (struct iio_device *dev, int *enable)</td></tr> | ||
| <tr class="memdesc:ga8c0aa6b86ce0fe5a4d56034f691994ed"><td class="mdescLeft"> </td><td class="mdescRight">Get current enable value of transmit and receiver FIRs. <a href="group__TopLevel.html#ga8c0aa6b86ce0fe5a4d56034f691994ed">More...</a><br /></td></tr> | ||
| <tr class="separator:ga8c0aa6b86ce0fe5a4d56034f691994ed"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga60ac5c3f6a5087faa3ab07edb645b874"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga60ac5c3f6a5087faa3ab07edb645b874">ad9361_generate_fir_taps</a> (struct <a class="el" href="structfilter__design__parameters.html">filter_design_parameters</a> *parameters, short *taps, int *num_taps, int *gain)</td></tr> | ||
| <tr class="memdesc:ga60ac5c3f6a5087faa3ab07edb645b874"><td class="mdescLeft"> </td><td class="mdescRight">Design custom FIR filter from specific design criteria. <a href="group__TopLevel.html#ga60ac5c3f6a5087faa3ab07edb645b874">More...</a><br /></td></tr> | ||
| <tr class="separator:ga60ac5c3f6a5087faa3ab07edb645b874"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:gae4eb2d63350b1903612e603cab13356d"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#gae4eb2d63350b1903612e603cab13356d">ad9361_calculate_rf_clock_chain</a> (unsigned long tx_sample_rate, unsigned long rate_gov, unsigned long *rx_path_clks, unsigned long *tx_path_clks)</td></tr> | ||
| <tr class="memdesc:gae4eb2d63350b1903612e603cab13356d"><td class="mdescLeft"> </td><td class="mdescRight">Calculate the clock path rates for both transmit and receiver paths. <a href="group__TopLevel.html#gae4eb2d63350b1903612e603cab13356d">More...</a><br /></td></tr> | ||
| <tr class="separator:gae4eb2d63350b1903612e603cab13356d"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:ga1dcf9c46eda4138d24dd279b30d13d40"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#ga1dcf9c46eda4138d24dd279b30d13d40">ad9361_calculate_rf_clock_chain_fdp</a> (struct <a class="el" href="structfilter__design__parameters.html">filter_design_parameters</a> *fdpTX, struct <a class="el" href="structfilter__design__parameters.html">filter_design_parameters</a> *fdpRX, unsigned long sample_rate)</td></tr> | ||
| <tr class="memdesc:ga1dcf9c46eda4138d24dd279b30d13d40"><td class="mdescLeft"> </td><td class="mdescRight">Calculate the clock path rates and default filter settings for both transmit and receiver for a desired baseband rate. <a href="group__TopLevel.html#ga1dcf9c46eda4138d24dd279b30d13d40">More...</a><br /></td></tr> | ||
| <tr class="separator:ga1dcf9c46eda4138d24dd279b30d13d40"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:gae31709100b0e132289bce9f4c0d475fd"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#gae31709100b0e132289bce9f4c0d475fd">ad9361_set_bb_rate_custom_filter_auto</a> (struct iio_device *dev, unsigned long rate)</td></tr> | ||
| <tr class="memdesc:gae31709100b0e132289bce9f4c0d475fd"><td class="mdescLeft"> </td><td class="mdescRight">Baseband rate configuration with custom filter support based on desired baseband sample rate. <a href="group__TopLevel.html#gae31709100b0e132289bce9f4c0d475fd">More...</a><br /></td></tr> | ||
| <tr class="separator:gae31709100b0e132289bce9f4c0d475fd"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:gafbdf950c341eb7df148a81836ad5dc2c"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#gafbdf950c341eb7df148a81836ad5dc2c">ad9361_set_bb_rate_custom_filter_manual</a> (struct iio_device *dev, unsigned long rate, unsigned long Fpass, unsigned long Fstop, unsigned long wnom_tx, unsigned long wnom_rx)</td></tr> | ||
| <tr class="memdesc:gafbdf950c341eb7df148a81836ad5dc2c"><td class="mdescLeft"> </td><td class="mdescRight">Baseband rate configuration with custom filter support based on desired baseband sample rate and simplified filter configuration. <a href="group__TopLevel.html#gafbdf950c341eb7df148a81836ad5dc2c">More...</a><br /></td></tr> | ||
| <tr class="separator:gafbdf950c341eb7df148a81836ad5dc2c"><td class="memSeparator" colspan="2"> </td></tr> | ||
| <tr class="memitem:gaeeb859740d88a808adc2dcc41c473495"><td class="memItemLeft" align="right" valign="top">__api int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__TopLevel.html#gaeeb859740d88a808adc2dcc41c473495">ad9361_fmcomms5_phase_sync</a> (struct iio_context *ctx, long long lo)</td></tr> | ||
| <tr class="memdesc:gaeeb859740d88a808adc2dcc41c473495"><td class="mdescLeft"> </td><td class="mdescRight">FMComms5 phase synchronize all TX and RX channels together. <a href="group__TopLevel.html#gaeeb859740d88a808adc2dcc41c473495">More...</a><br /></td></tr> | ||
| <tr class="separator:gaeeb859740d88a808adc2dcc41c473495"><td class="memSeparator" colspan="2"> </td></tr> | ||
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