-
Notifications
You must be signed in to change notification settings - Fork 1.5k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
AD469x_fmc: Initial version for Coraz7s and DE-10Nano #1463
base: main
Are you sure you want to change the base?
Conversation
Update Makefile |
Project should be renamed without "_fmc". I suggest "ad469x_evb" |
set spi_clk_ref_frequency 160 | ||
|
||
# specify ADC resolution -- supported resolutions 16 bits | ||
set adc_resolution 16 | ||
|
||
# specify ADC sampling rate in samples/seconds | ||
set adc_sampling_rate 1000000 |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
remove useless variables
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt" | ||
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 | ||
|
||
set sys_cstring "SPI_CLK_FREQ=$spi_clk_ref_frequency\ |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
cstring must contain build parameters
|
||
set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS33 IOB TRUE} [get_ports ad469x_spi_sclk]; ## CK_IO13 | ||
set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS33 IOB TRUE PULLTYPE PULLUP} [get_ports ad469x_spi_sdo]; ## CK_IO12 | ||
set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVCMOS33 IOB TRUE PULLTYPE PULLUP} [get_ports ad469x_spi_sdi]; ## CK_IO11 |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
remove pullups
.dio_o(gpio_i[7:2]), | ||
.dio_p(led)); | ||
|
||
assign gpio_i[31:8] = gpio_o[31:8]; |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
move higher next to other assigments
wire [63:0] gpio_o; | ||
wire [63:0] gpio_t; | ||
|
||
wire ad469x_spi_cnv_s; |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
spacing
V1: Initial version for DE10-Nano |
de10nano has offload/trigger not connected and execution/sdi not connected |
Signed-off-by: Liviu Adace <[email protected]>
Signed-off-by: Liviu Adace <[email protected]>
PR Description
Initial version for Coraz7s
PR Type
PR Checklist