Initial support for Tang nano 9k board #208
Conversation
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The CI is stuck on "amaranth.vendor.gowin" missing. |
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Yes, that's right @josuah, that's up to @whitequark. I've ironed out a few more things in the last weeks while actually working with the board. |
…O pins by default.
| part = "GW1NR-LV9QN88PC6/I5" | ||
| family = "GW1NR-9C" | ||
| default_clk = "clk27" # or "OSC" to use on-chip oscillator | ||
| osc_frequency = 2500000 # Hz |
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Our general policy here is that if default_clk points to a pin (like here), then osc_frequency is unspecified. However if the external clock is missing or unusable (like on the original Tang Nano), then default_clk would be OSC and the frequency would be specified by the designer, with some reasonable default (like 24 MHz).
| from amaranth.vendor.gowin import * | ||
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| try: | ||
| from .resources import * |
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This should only be from .resources import *; for testing you can install amaranth-boards in "editable mode".
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| if __name__ == "__main__": | ||
| try: | ||
| from .test.blinky import * |
| " 54 55 56 57 68 69" | ||
| ), | ||
| # TODO: Convert to Resource | ||
| Connector("rgb_lcd", 0, |
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You can take this for inspiration.
| family = "GW1NR-9C" | ||
| default_clk = "clk27" # or "OSC" to use on-chip oscillator | ||
| osc_frequency = 2500000 # Hz | ||
| board = "tangnano9k" |
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Our convention is to inline the board field you have here into toolchain_program.
| clk="36", cmd="37", dat0="39", dat3="38", wp_n="-", | ||
| attrs=Attrs(IO_TYPE="LVCMOS33")), | ||
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| Resource("backlight_pwm", 0, Pins("86", dir="o"), |
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| Resource("backlight_pwm", 0, Pins("86", dir="o"), | |
| Resource("lcd_backlight", 0, Pins("86", dir="o"), |
| UARTResource(0, rx="18", tx="17", | ||
| attrs=Attrs(PULL_MODE="UP", IO_TYPE="LVCMOS33")), | ||
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| *SPIFlashResources(0, |
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Is this also a PSRAM on the 9k? If so, it should be:
| *SPIFlashResources(0, | |
| *SPIFlashResources("psram", 0, |
| # PIN76_MCLK SCL | ||
| # PIN48_CS CS | ||
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| Resource("hdmi", 0, # FPGA_HDMI |
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Would you like to add HDMIResource?
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| ] | ||
| connectors = [ | ||
| Connector("gpio", 0, |
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The silk that is printed on the board refers to FPGA pin numbers, is that correct?
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This is what I remember from trying: they can be put in the .cst files as pin number.
This is also what the pinout diagram from Sipeed suggests:
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By silk I mean the other side (not visible on the diagram).
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Yes, they just number their pins and also put these numbers on the silkscreen next to the GPIO headers.
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Then we probably don't need this connector since it's much easier and less error prone to use actual pin numbers.
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They match with the grey "IC Pin number" from the pinout diagram.
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I now have a Tang Nano 9K and can test this PR. |
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See #233. |
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Obsoleted by #233. Thank you for this work! |
Pending PR amaranth-lang/amaranth#734 for platform support.