Himbaechel GUI

himbaechel/arch.cc

@@ -504,4 +504,61 @@ IdString Arch::get_tile_type(int tile) const
     return IdString(tile_data.type_name);
 }
 
+std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
+{
+    std::vector<GraphicElement> ret;
+    if (decal.type == DecalId::TYPE_BEL) {
+        BelId bel(decal.tile, decal.index);
+        GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
+        uarch->drawBel(ret, style, getBelType(bel), getBelLocation(bel));
+    } else if (decal.type == DecalId::TYPE_WIRE) {
+        WireId wire(decal.tile, decal.index);
+        auto wire_type = getWireType(wire);
+        GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
+        Loc loc;
+        tile_xy(chip_info, wire.tile, loc.x, loc.y);
+        int32_t tilewire = chip_wire_info(chip_info, wire).tile_wire;
+        uarch->drawWire(ret, style, loc, wire_type, tilewire, get_tile_type(wire.tile));
+    } else if (decal.type == DecalId::TYPE_PIP) {
+        PipId pip(decal.tile, decal.index);
+        WireId src_wire = getPipSrcWire(pip);
+        WireId dst_wire = getPipDstWire(pip);
+        Loc loc = getPipLocation(pip);
+        int32_t src_id = chip_wire_info(chip_info, src_wire).tile_wire;
+        int32_t dst_id = chip_wire_info(chip_info, dst_wire).tile_wire;
+        GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_HIDDEN;
+        uarch->drawPip(ret, style, loc, src_wire, getWireType(src_wire), src_id, dst_wire, getWireType(dst_wire), dst_id);
+    }
+    return ret;
+}
+
+DecalXY Arch::getBelDecal(BelId bel) const
+{
+    DecalXY decalxy;
+    decalxy.decal = DecalId(bel.tile, bel.index, DecalId::TYPE_BEL);
+    decalxy.decal.active = getBoundBelCell(bel) != nullptr;
+    return decalxy;
+}
+
+DecalXY Arch::getWireDecal(WireId wire) const
+{
+    DecalXY decalxy;
+    decalxy.decal = DecalId(wire.tile, wire.index, DecalId::TYPE_WIRE);
+    decalxy.decal.active = getBoundWireNet(wire) != nullptr;
+    return decalxy;
+}
+
+DecalXY Arch::getPipDecal(PipId pip) const
+{
+    DecalXY decalxy;
+    decalxy.decal = DecalId(pip.tile, pip.index, DecalId::TYPE_PIP);
+    decalxy.decal.active = getBoundPipNet(pip) != nullptr;
+    return decalxy;
+}
+
+DecalXY Arch::getGroupDecal(GroupId group) const
+{
+    return DecalXY();
+}
+
 NEXTPNR_NAMESPACE_END

himbaechel/arch.h

@@ -698,6 +698,15 @@ struct Arch : BaseArch<ArchRanges>
     {
         return uarch->getClusterPlacement(cluster, root_bel, placement);
     }
+
+    // -------------------------------------------------
+    // Decal methods
+    std::vector<GraphicElement> getDecalGraphics(DecalId decal) const override;
+    DecalXY getBelDecal(BelId bel) const override;
+    DecalXY getWireDecal(WireId wire) const override;
+    DecalXY getPipDecal(PipId pip) const override;
+    DecalXY getGroupDecal(GroupId group) const override;
+
     // ------------------------------------------------
 
     bool pack() override;

himbaechel/archdefs.h

@@ -85,7 +85,28 @@ struct PipId
     unsigned int hash() const { return mkhash(tile, index); }
 };
 
-typedef IdString DecalId;
+struct DecalId
+{
+    int32_t tile = -1;
+    int32_t index = -1;
+    enum DecalType
+    {
+        TYPE_NONE,
+        TYPE_BEL,
+        TYPE_WIRE,
+        TYPE_PIP,
+        TYPE_GROUP
+    } type = TYPE_NONE;
+    bool active = false;
+
+    DecalId() = default;
+    DecalId(int32_t tile, int32_t index, DecalType type) : tile(tile), index(index), type(type) {};
+
+    bool operator==(const DecalId &other) const { return tile == other.tile && index == other.index && type == other.type; }
+    bool operator!=(const DecalId &other) const { return tile != other.tile || index != other.index || type != other.type; }
+    unsigned int hash() const { return mkhash(tile, mkhash(index, type)); }
+};
+
 typedef IdString GroupId;
 typedef IdString BelBucketId;
 typedef IdString ClusterId;

himbaechel/chipdb.h

@@ -62,6 +62,7 @@ NPNR_PACKED_STRUCT(struct BelPinRefPOD {
 NPNR_PACKED_STRUCT(struct TileWireDataPOD {
     int32_t name;
     int32_t wire_type;
+    int32_t tile_wire;
     int32_t const_value;
     int32_t flags;      // 32 bits of arbitrary data
     int32_t timing_idx; // used only when the wire is not part of a node, otherwise node idx applies

himbaechel/himbaechel_api.h

@@ -55,6 +55,13 @@ struct Context;
 
 struct PlacerHeapCfg;
 
+namespace GfxFlags {
+    static constexpr uint32_t FLAG_INVERT_Y  = 0x0001;
+    static constexpr uint32_t FLAG_SHOW_BEL  = 0x0002;
+    static constexpr uint32_t FLAG_SHOW_WIRE = 0x0004;
+    static constexpr uint32_t FLAG_SHOW_PIP  = 0x0008;
+}
+
 struct HimbaechelAPI
 {
     // Architecture specific context initialization
@@ -105,6 +112,15 @@ struct HimbaechelAPI
     virtual bool isClusterStrict(const CellInfo *cell) const;
     virtual bool getClusterPlacement(ClusterId cluster, BelId root_bel,
                                      std::vector<std::pair<CellInfo *, BelId>> &placement) const;
+
+    // Graphics
+    virtual void drawBel(std::vector<GraphicElement> &g, GraphicElement::style_t style, IdString bel_type, Loc loc) {};
+
+    virtual void drawWire(std::vector<GraphicElement> &g, GraphicElement::style_t style, Loc loc, IdString wire_type, int32_t tilewire, IdString tile_type) {};
+
+    virtual void drawPip(std::vector<GraphicElement> &g,GraphicElement::style_t style, Loc loc,
+                WireId src, IdString src_type, int32_t src_id, WireId dst, IdString dst_type, int32_t dst_id) {};
+
     // --- Flow hooks ---
     virtual void pack(){}; // replaces the pack function
     // Called before and after main placement and routing

himbaechel/himbaechel_dbgen/chip.py

@@ -144,6 +144,7 @@ class TileWireData:
     index: int
     name: IdString
     wire_type: IdString
+    tile_wire: int
     const_value: IdString = field(default_factory=list)
     flags: int = 0
     timing_idx: int = -1
@@ -166,6 +167,7 @@ def serialise_lists(self, context: str, bba: BBAWriter):
     def serialise(self, context: str, bba: BBAWriter):
         bba.u32(self.name.index)
         bba.u32(self.wire_type.index)
+        bba.u32(self.tile_wire)
         bba.u32(self.const_value.index)
         bba.u32(self.flags)
         bba.u32(self.timing_idx)
@@ -202,6 +204,7 @@ def serialise(self, context: str, bba: BBAWriter):
 @dataclass
 class TileType(BBAStruct):
     strs: StringPool
+    gfx_wire_ids: dict()
     tmg: "TimingPool"
     type_name: IdString
     bels: list[BelData] = field(default_factory=list)
@@ -229,9 +232,13 @@ def add_bel_pin(self, bel: BelData, pin: str, wire: str, dir: PinType):
 
     def create_wire(self, name: str, type: str="", const_value: str=""):
         # Create a new tile wire of a given name and type (optional) in the tile type
+        tile_wire = 0
+        if ("TILE_WIRE_" + name) in self.gfx_wire_ids:
+            tile_wire = self.gfx_wire_ids["TILE_WIRE_" + name]
         wire = TileWireData(index=len(self.wires),
             name=self.strs.id(name),
             wire_type=self.strs.id(type),
+            tile_wire=tile_wire,
             const_value=self.strs.id(const_value))
         self._wire2idx[wire.name] = wire.index
         self.wires.append(wire)
@@ -691,8 +698,9 @@ def __init__(self, uarch: str, name: str, width: int, height: int):
         self.packages = []
         self.extra_data = None
         self.timing = TimingPool(self.strs)
+        self.gfx_wire_ids = dict()
     def create_tile_type(self, name: str):
-        tt = TileType(self.strs, self.timing, self.strs.id(name))
+        tt = TileType(self.strs, self.gfx_wire_ids, self.timing, self.strs.id(name))
         self.tile_type_idx[name] = len(self.tile_types)
         self.tile_types.append(tt)
         return tt
@@ -857,3 +865,18 @@ def write_bba(self, filename):
             bba.ref('chip_info')
             self.serialise(bba)
             bba.pop()
+
+    def read_gfx_h(self, filename):
+        with open(filename) as f:
+            state = 0
+            for line in f:
+                if state == 0 and line.startswith("enum GfxTileWireId"):
+                    state = 1
+                elif state == 1 and line.startswith("};"):
+                    state = 0
+                elif state == 1 and (line.startswith("{") or line.strip() == ""):
+                    pass
+                elif state == 1:
+                    idx = len(self.gfx_wire_ids)
+                    name = line.strip().rstrip(",")
+                    self.gfx_wire_ids[name] = idx

himbaechel/uarch/example/CMakeLists.txt

@@ -22,6 +22,7 @@ foreach(device ${HIMBAECHEL_EXAMPLE_DEVICES})
 			bbasm
 			${CMAKE_CURRENT_SOURCE_DIR}/example_arch_gen.py
 			${CMAKE_CURRENT_SOURCE_DIR}/constids.inc
+			${CMAKE_CURRENT_SOURCE_DIR}/gfx.h
 		VERBATIM)
 	list(APPEND chipdb_binaries ${device_bin})
 endforeach()

himbaechel/uarch/example/constids.inc

@@ -13,7 +13,31 @@ X(IOB)
 X(PAD)
 X(INIT)
 
+X(BRAM_512X16)
+
 X(GND)
 X(GND_DRV)
 X(VCC)
-X(VCC_DRV)
+X(VCC_DRV)
+
+X(LUT_INPUT)
+X(FF_DATA)
+X(LUT_OUT)
+X(FF_OUT)
+X(TILE_CLK)
+
+X(RAM_IN)
+X(RAM_OUT)
+
+X(IO_I)
+X(IO_O)
+X(IO_T)
+X(IO_PAD)
+X(GCLK)
+
+X(CLK_ROUTE)
+
+X(LOGIC)
+X(BRAM)
+X(IO)
+X(NULL)