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soc: arm: ambiq: Remove the redundant configurations.
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These non-cached SRAM size and base address configurations
are not needed now.

Signed-off-by: Aaron Ye <[email protected]>
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aaronyegx authored and fabiobaltieri committed Jan 4, 2024
1 parent d142958 commit c3e8b73
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Showing 2 changed files with 0 additions and 16 deletions.
8 changes: 0 additions & 8 deletions soc/arm/ambiq/apollo4x/Kconfig.defconfig.apollo4p
Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,4 @@ if SOC_APOLLO4P
config NUM_IRQS
default 83

DT_NODE_SRAM := /memory@0

config SRAM_NC_SIZE
default $(dt_node_reg_size_int,$(DT_NODE_SRAM),1,K)

config SRAM_NC_BASE_ADDRESS
default $(dt_node_reg_addr_hex,$(DT_NODE_SRAM),1)

endif # SOC_APOLLO4P
8 changes: 0 additions & 8 deletions soc/arm/ambiq/apollo4x/Kconfig.defconfig.apollo4p_blue
Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,4 @@ if SOC_APOLLO4P_BLUE
config NUM_IRQS
default 83

DT_NODE_SRAM := /memory@0

config SRAM_NC_SIZE
default $(dt_node_reg_size_int,$(DT_NODE_SRAM),1,K)

config SRAM_NC_BASE_ADDRESS
default $(dt_node_reg_addr_hex,$(DT_NODE_SRAM),1)

endif # SOC_APOLLO4P_BLUE

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