boards: nxp: add mimxrt1180_evk board

Support rgpio/lpuart peripherals Support linkserver/jlink debug ways Test cases: hello_world; button; blinky; synchronization; philosophers There is one limitation with flashing and debugging the SoC's second core(M7) that will be addressed with furture submission Signed-off-by: Lucien Zhao <[email protected]>
YoeDistro · Aug 15, 2024 · 3f96bfb · 3f96bfb
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diff --git a/boards/nxp/mimxrt1180_evk/CMakeLists.txt b/boards/nxp/mimxrt1180_evk/CMakeLists.txt
@@ -0,0 +1,27 @@
+#
+# Copyright 2024 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if(CONFIG_NXP_IMXRT_BOOT_HEADER)
+  zephyr_library()
+  if(NOT ((DEFINED CONFIG_BOARD_MIMXRT1180_EVK_MIMXRT1189_CM33)
+	  OR (DEFINED CONFIG_BOARD_MIMXRT1180_EVK_MIMXRT1189_CM7)))
+    message(WARNING "It appears you are using the board definition for "
+     "the MIMXRT1180-EVK, but targeting a custom board. You may need to "
+     "update your flash configuration or device configuration data blocks")
+  endif()
+  set(RT1180_BOARD_DIR
+    "${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk/boards/evkmimxrt1180")
+  if(CONFIG_BOOT_FLEXSPI_NOR)
+    # Include flash configuration block for RT1180 EVK from NXP's HAL.
+    # This configuration block may need modification if another flash chip is
+    # used on your custom board.
+    zephyr_compile_definitions(XIP_EXTERNAL_FLASH=1)
+    zephyr_compile_definitions(XIP_BOOT_HEADER_ENABLE=1)
+    zephyr_library_sources(${RT1180_BOARD_DIR}/xip/evkmimxrt1180_flexspi_nor_config.c)
+    zephyr_library_include_directories(${RT1180_BOARD_DIR}/xip)
+    zephyr_library_include_directories(${RT1180_BOARD_DIR})
+  endif()
+endif()
diff --git a/boards/nxp/mimxrt1180_evk/Kconfig.defconfig b/boards/nxp/mimxrt1180_evk/Kconfig.defconfig
@@ -0,0 +1,8 @@
+# MIMXRT1180-EVK board
+
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_MIMXRT1180_EVK
+
+endif # BOARD_MIMXRT1180_EVK
diff --git a/boards/nxp/mimxrt1180_evk/Kconfig.mimxrt1180_evk b/boards/nxp/mimxrt1180_evk/Kconfig.mimxrt1180_evk
@@ -0,0 +1,10 @@
+#
+# Copyright 2024 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_MIMXRT1180_EVK
+	select SOC_PART_NUMBER_MIMXRT1189CVM8B
+	select SOC_MIMXRT1189_CM33 if BOARD_MIMXRT1180_EVK_MIMXRT1189_CM33
+	select SOC_MIMXRT1189_CM7 if BOARD_MIMXRT1180_EVK_MIMXRT1189_CM7
diff --git a/boards/nxp/mimxrt1180_evk/board.cmake b/boards/nxp/mimxrt1180_evk/board.cmake
@@ -0,0 +1,23 @@
+#
+# Copyright 2024 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+set(RT1180_BOARD_DIR
+"${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk/boards/evkmimxrt1180")
+# Note1: Suggest developers use Secure Provisioning Tool(SPT) to download RT1180 image
+# SPT can be downloaded on NXP web: https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-secure-provisioning-tool:MCUXPRESSO-SECURE-PROVISIONING
+# Details about the usage of SPT on MIMXRT1180-EVK board can be referred on chapter 7 of getting start with Mcuxpresso SDK for MIMXRT1180-EVK doc in SDK package.
+if(CONFIG_SOC_MIMXRT1189_CM33)
+board_runner_args(linkserver  "--device=MIMXRT1189xxxxx:MIMXRT1180-EVK")
+board_runner_args(jlink "--device=MIMXRT1189xxx8_M33" "--reset-after-load" "--tool-opt=-jlinkscriptfile ${RT1180_BOARD_DIR}/jlinkscript/evkmimxrt1180_cm33.jlinkscript")
+elseif(CONFIG_SOC_MIMXRT1189_CM7)
+# Note: Only support run cm7 image when debugging due to default boot core on board is cm33 core
+board_runner_args(linkserver  "--device=MIMXRT1189xxxxx:MIMXRT1180-EVK")
+board_runner_args(linkserver "--core=cm7")
+board_runner_args(jlink "--device=MIMXRT1189xxx8_M7" "--speed=4000" "--no-reset" "--tool-opt=-jlinkscriptfile ${RT1180_BOARD_DIR}/jlinkscript/evkmimxrt1180_cm7.jlinkscript" "--tool-opt=-ir")
+endif()
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
diff --git a/boards/nxp/mimxrt1180_evk/board.yml b/boards/nxp/mimxrt1180_evk/board.yml
@@ -0,0 +1,5 @@
+board:
+  name: mimxrt1180_evk
+  vendor: nxp
+  socs:
+    - name: mimxrt1189
diff --git a/boards/nxp/mimxrt1180_evk/doc/index.rst b/boards/nxp/mimxrt1180_evk/doc/index.rst
@@ -0,0 +1,251 @@
+.. _mimxrt1180_evk:
+
+NXP MIMXRT1180-EVK
+##################
+
+Overview
+********
+
+The dual core i.MX RT1180 runs on the Cortex-M33 core at 240 MHz and on the
+Cortex-M7 at 792 MHz. The i.MX RT1180 MCU offers support over a wide
+temperature range and is qualified for consumer, industrial and automotive
+markets.
+
+.. image:: mimxrt1180_evk.webp
+   :align: center
+   :alt: MIMXRT1180-EVK
+
+Hardware
+********
+
+- MIMXRT1189CVM8B MCU
+
+  - 240MHz Cortex-M33 & 792Mhz Cortex-M7
+  - 1.5MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
+
+- Memory
+
+  - 512 Mbit SDRAM
+  - 128 Mbit QSPI Flash
+  - 512 Mbit HYPER RAM
+  - TF socket for SD card
+
+- Ethernet
+
+  - 1000 Mbit/s Ethernet PHY
+
+- USB
+
+  - 2* USB 2.0 OTG connector
+
+- Audio
+
+  - 3.5 mm audio stereo headphone jack
+  - Board-mounted microphone
+  - Left and right speaker out connectors
+
+- Power
+
+  - 5 V DC jack
+
+- Debug
+
+  - JTAG 20-pin connector
+  - MCU-Link with DAPLink
+
+- Expansion port
+
+  - Arduino interface
+
+- CAN bus connector
+
+For more information about the MIMXRT1180 SoC and MIMXRT1180-EVK board, see
+these references:
+
+- `i.MX RT1180 Website`_
+- `MIMXRT1180-EVK Website`_
+
+External Memory
+===============
+
+This platform has the following external memories:
+
++--------------------+------------+-------------------------------------+
+| Device             | Controller | Status                              |
++====================+============+=====================================+
+| W9825G6KH          | SEMC       | Enabled via device configuration    |
+|                    |            | data block, which sets up SEMC at   |
+|                    |            | boot time                           |
++--------------------+------------+-------------------------------------+
+| W25Q128JWSIQ       | FLEXSPI    | Enabled via flash configurationn    |
+|                    |            | block, which sets up FLEXSPI at     |
+|                    |            | boot time.                          |
++--------------------+------------+-------------------------------------+
+
+Supported Features
+==================
+
+The mimxrt1180_evk board configuration supports the hardware features listed
+below.  For additional features not yet supported, please also refer to the
+:ref:`mimxrt1170_evk` , which is the superset board in NXP's i.MX RT11xx family.
+NXP prioritizes enabling the superset board with NXP's Full Platform Support for
+Zephyr.  Therefore, the mimxrt1170_evk board may have additional features
+already supported, which can also be re-used on this mimxrt1180_evk board:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| COUNTER   | on-chip    | counter                             |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+
+The default configuration can be found in the defconfig file:
+:zephyr_file:`boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33_defconfig`
+
+Other hardware features are not currently supported by the port.
+
+
+Connections and I/Os
+====================
+
+The MIMXRT1180 SoC has six pairs of pinmux/gpio controllers.
+
++---------------+-----------------+---------------------------+
+| Name          | Function        | Usage                     |
++===============+=================+===========================+
+| GPIO_AON_04   | GPIO            | SW8                       |
++---------------+-----------------+---------------------------+
+| GPIO_AD_27    | GPIO            | LED                       |
++---------------+-----------------+---------------------------+
+| GPIO_AON_08   | LPUART1_TX      | UART Console              |
++---------------+-----------------+---------------------------+
+| GPIO_AON_09   | LPUART1_RX      | UART Console              |
++---------------+-----------------+---------------------------+
+
+System Clock
+============
+
+The MIMXRT1180 SoC is configured to use SysTick as the system clock source,
+running at 240MHz. When targeting the M7 core, SysTick will also be used,
+running at 792MHz
+
+Serial Port
+===========
+
+The MIMXRT1180 SoC has 12 UARTs. One is configured for the console and the
+remaining are not used.
+
+Programming and Debugging
+*************************
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Configuring a Debug Probe
+=========================
+
+A debug probe is used for both flashing and debugging the board. This board is
+configured by default to use the :ref:`mcu-link-cmsis-onboard-debug-probe`,
+however the :ref:`pyocd-debug-host-tools` do not yet support programming the
+external flashes on this board so you must reconfigure the board for one of the
+following debug probes instead.
+
+.. _Using J-Link RT1180:
+
+Using J-Link
+------------
+
+Please ensure used JLINK above V7.94g and jumper JP5 installed if using
+external jlink plus on J37 as debugger.
+
+When debugging cm33 core, need to ensure the SW5 on "0100" mode.
+When debugging cm7 core, need to ensure the SW5 on "0001" mode.
+(Only support run cm7 image when debugging due to default boot core on board is cm33 core)
+
+Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
+path.
+
+There are two options: the onboard debug circuit can be updated with Segger
+J-Link firmware, or :ref:`jlink-external-debug-probe` can be attached to the
+EVK.
+
+
+Using Linkserver
+----------------
+
+Please ensure used linkserver above V1.5.30 and jumper JP5 uninstalled.
+
+When debugging cm33 core, need to ensure the SW5 on "0100" mode.
+When debugging cm7 core, need to ensure the SW5 on "0001" mode.
+(Only support run cm7 image when debugging due to default boot core on board is cm33 core)
+
+Configuring a Console
+=====================
+
+Regardless of your choice in debug probe, we will use the MCU-Link
+microcontroller as a usb-to-serial adapter for the serial console. Check that
+jumpers JP5 and JP3 are **on** (they are on by default when boards ship from
+the factory) to connect UART signals to the MCU-Link microcontroller.
+
+Connect a USB cable from your PC to J53.
+
+Use the following settings with your serial terminal of choice (minicom, putty,
+etc.):
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Flashing
+========
+
+Here is an example for the :ref:`hello_world` application on cm33 core.
+
+Before power on the board, make sure SW5 is set to 0100b
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: mimxrt1180_evk/mimxrt1189/cm33
+   :goals: flash
+
+Power off the board, then power on the board and
+open a serial terminal, reset the board (press the SW3 button), and you should
+see the following message in the terminal:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS v3.7.0-xxx-xxxxxxxxxxxxx *****
+   Hello World! mimxrt1180_evk/mimxrt1189/cm33
+
+Debugging
+=========
+
+Here is an example for the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: mimxrt1180_evk/mimxrt1189/cm33
+   :goals: debug
+
+Open a serial terminal, step through the application in your debugger, and you
+should see the following message in the terminal:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS v3.7.0-xxx-xxxxxxxxxxxxx *****
+   Hello World! mimxrt1180_evk/mimxrt1189/cm33
+
+.. _MIMXRT1180-EVK Website:
+   https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1180-evaluation-kit:MIMXRT1180-EVK
+
+.. _i.MX RT1180 Website:
+   https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt1180-crossover-mcu-with-tsn-switch-and-edgelock:i.MX-RT1180
diff --git a/boards/nxp/mimxrt1180_evk/doc/mimxrt1180_evk.webp b/boards/nxp/mimxrt1180_evk/doc/mimxrt1180_evk.webp
diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2024 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ */
+
+#include <nxp/nxp_imx/rt/mimxrt1189cvm8b-pinctrl.dtsi>
+
+&pinctrl {
+	pinmux_lpspi3: pinmux_lpspi3 {
+		group0 {
+			pinmux = <&iomuxc_gpio_sd_b1_00_lpspi3_pcs0>,
+				<&iomuxc_gpio_sd_b1_01_lpspi3_sck>,
+				<&iomuxc_gpio_sd_b1_02_lpspi3_sout>,
+				<&iomuxc_gpio_sd_b1_03_lpspi3_sin>;
+			drive-strength = "high";
+			slew-rate = "fast";
+		};
+	};
+
+	pinmux_lpuart1: pinmux_lpuart1 {
+		group0 {
+			pinmux = <&iomuxc_aon_gpio_aon_09_lpuart1_rxd>,
+				<&iomuxc_aon_gpio_aon_08_lpuart1_txd>;
+			drive-strength = "high";
+			slew-rate = "fast";
+		};
+	};
+
+	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
+		group0 {
+			pinmux = <&iomuxc_aon_gpio_aon_09_gpio1_io09>;
+			drive-strength = "high";
+			bias-pull-up;
+			slew-rate = "fast";
+		};
+		group1 {
+			pinmux = <&iomuxc_aon_gpio_aon_08_lpuart1_txd>;
+			drive-strength = "high";
+			slew-rate = "fast";
+		};
+	};
+};