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Preparation for adding support for other CH32 variants (renaming func…
…tions), exposing more methods, add some initial definitions for future ch32x035 support, add initial support for option bytes
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/** | ||
* Copyright (c) 2025 Nicolai Electronics | ||
* | ||
* SPDX-License-Identifier: MIT | ||
*/ | ||
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#pragma once | ||
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// Register definitions from the CH32V20x and CH32V30x reference manual | ||
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// Addresses | ||
#define CH32V20X_ADDR_OPTION_BYTES 0x1FFFF800 | ||
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// CH32V20X and CH32V30X flash status register | ||
#define CH32V20X_FLASH_STATR_BSY (1 << 0) // Flash is busy writing or erasing | ||
#define CH32V20X_FLASH_STATR_WRBUSY (1 << 1) // Flash is busy writing | ||
#define CH32V20X_FLASH_STATR_WRPRTERR (1 << 4) // Flash write protection error | ||
#define CH32V20X_FLASH_STATR_EOP (1 << 5) // Flash is finished with the operation | ||
#define CH32V20X_FLASH_STATR_EHMODS (1 << 7) // Flash enhanced read mode start | ||
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// CH32V20X and CH32V30X flash control register | ||
#define CH32V20X_FLASH_CTLR_PG (1 << 0) // Perform standard programming operation | ||
#define CH32V20X_FLASH_CTLR_PER (1 << 1) // Perform 1K sector erase | ||
#define CH32V20X_FLASH_CTLR_MER (1 << 2) // Perform full Flash erase | ||
#define CH32V20X_FLASH_CTLR_OBG (1 << 4) // Perform user-selected word program | ||
#define CH32V20X_FLASH_CTLR_OBER (1 << 5) // Perform user-selected word erasure | ||
#define CH32V20X_FLASH_CTLR_STRT (1 << 6) // Start an erase operation | ||
#define CH32V20X_FLASH_CTLR_LOCK (1 << 7) // Lock the FLASH | ||
#define CH32V20X_FLASH_CTLR_FTPG (1 << 16) // Start a fast page programming operation (256 bytes) | ||
#define CH32V20X_FLASH_CTLR_FTER (1 << 17) // Start a fast page erase operation (256 bytes) | ||
#define CH32V20X_FLASH_CTLR_PGSTRT (1 << 21) // Start a page programming operation (256 bytes) |
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/** | ||
* Copyright (c) 2025 Nicolai Electronics | ||
* | ||
* SPDX-License-Identifier: MIT | ||
*/ | ||
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#pragma once | ||
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// Register definitions from the CH32X035 reference manual | ||
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// CH32X035 flash status register | ||
#define CH32X035_FLASH_STATR_BSY (1 << 0) // Flash is busy writing or erasing | ||
#define CH32X035_FLASH_STATR_WRPRTERR (1 << 4) // Flash write protection error | ||
#define CH32X035_FLASH_STATR_EOP (1 << 5) // Flash is finished with the operation | ||
#define CH32X035_FLASH_STATR_FWAKE_FLAG (1 << 6) // Flash wake-up flag | ||
#define CH32X035_FLASH_STATR_TURBO (1 << 7) // Flash turbo mode enable | ||
#define CH32X035_FLASH_STATR_BOOT_AVA (1 << 12) // Initial configuration word status | ||
#define CH32X035_FLASH_STATR_BOOT_STATUS (1 << 13) // Source of currently executing program | ||
#define CH32X035_FLASH_STATR_BOOT_MODE (1 << 14) // Switch between user area and boot area | ||
#define CH32X035_FLASH_STATR_BOOT_LOCK (1 << 15) // Boot zone lockout | ||
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// CH32X035 flash control register | ||
#define CH32X035_FLASH_CTLR_PER (1 << 1) // Perform 1K sector erase | ||
#define CH32X035_FLASH_CTLR_MER (1 << 2) // Perform full flash erase | ||
#define CH32X035_FLASH_CTLR_OBPG (1 << 4) // Perform user option bytes word program | ||
#define CH32X035_FLASH_CTLR_OBER (1 << 5) // Perform user option bytes word erasure | ||
#define CH32X035_FLASH_CTLR_STRT (1 << 6) // Start an erase or program operation | ||
#define CH32X035_FLASH_CTLR_LOCK (1 << 7) // Lock the flash | ||
#define CH32X035_FLASH_CTLR_OBWRE (1 << 9) // Unlock the user option bytes | ||
#define CH32X035_FLASH_CTLR_ERRIE (1 << 10) // Error status interrupt enable | ||
#define CH32X035_FLASH_CTLR_EOPIE (1 << 12) // Operation completion interrupt enable | ||
#define CH32X035_FLASH_CTLR_FWAKEIE (1 << 13) // Wake-up interrupt enable | ||
#define CH32X035_FLASH_CTLR_FLOCK (1 << 15) // Fast programming lock | ||
#define CH32X035_FLASH_CTLR_FTPG (1 << 16) // Perform a fast page programming operation (256 bytes) | ||
#define CH32X035_FLASH_CTLR_FTER (1 << 17) // Start a fast page erase operation (256 bytes) | ||
#define CH32X035_FLASH_CTLR_BUFLOAD (1 << 18) // Cache data into BUF | ||
#define CH32X035_FLASH_CTLR_BUFRST (1 << 19) // Buffer BUF reset operation | ||
#define CH32X035_FLASH_CTLR_BER32 (1 << 23) // Execute block erasure 32KB |
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/** | ||
* Copyright (c) 2025 Nicolai Electronics | ||
* | ||
* SPDX-License-Identifier: MIT | ||
*/ | ||
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#pragma once | ||
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#include <stdint.h> | ||
#include "rvswd.h" | ||
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typedef void (*ch32v20x_status_callback)(char const* msg, uint8_t progress); | ||
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// Option bytes | ||
bool ch32v20x_read_option_bytes(rvswd_handle_t* handle); | ||
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// Program and restart the CH32V203 | ||
bool ch32v20x_program(rvswd_handle_t* handle, void const* firmware, size_t firmware_len, | ||
ch32v20x_status_callback status_callback); | ||
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rvswd_result_t ch32v20x_halt_microprocessor(rvswd_handle_t* handle); | ||
rvswd_result_t ch32v20x_resume_microprocessor(rvswd_handle_t* handle); | ||
rvswd_result_t ch32v20x_reset_microprocessor_and_run(rvswd_handle_t* handle); | ||
bool ch32v20x_write_cpu_reg(rvswd_handle_t* handle, uint16_t regno, uint32_t value); | ||
bool ch32v20x_read_cpu_reg(rvswd_handle_t* handle, uint16_t regno, uint32_t* value_out); | ||
bool ch32v20x_run_debug_code(rvswd_handle_t* handle, void const* code, size_t code_size); | ||
bool ch32v20x_read_memory_word(rvswd_handle_t* handle, uint32_t address, uint32_t* value_out); | ||
bool ch32v20x_write_memory_word(rvswd_handle_t* handle, uint32_t address, uint32_t value); | ||
bool ch32v20x_wait_flash(rvswd_handle_t* handle); | ||
void ch32v20x_wait_flash_write(rvswd_handle_t* handle); | ||
bool ch32v20x_unlock_flash(rvswd_handle_t* handle); | ||
bool ch32v20x_lock_flash(rvswd_handle_t* handle); | ||
bool ch32v20x_erase_flash_block(rvswd_handle_t* handle, uint32_t addr); | ||
bool ch32v20x_write_flash_block(rvswd_handle_t* handle, uint32_t addr, void const* data); | ||
bool ch32v20x_write_flash(rvswd_handle_t* handle, uint32_t addr, void const* _data, size_t data_len, | ||
ch32v20x_status_callback status_callback); | ||
bool ch32v20x_clear_running_operations(rvswd_handle_t* handle); | ||
bool ch32v20x_read_option_bytes(rvswd_handle_t* handle); |
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