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sibanez12 edited this page Mar 20, 2019 · 6 revisions

FAQ

Question 1

I see something like the following error when I try to start the CLI tool:

root@nf-server06:CLI$ ./P4_SWITCH_CLI.py 
WARNING: No route found for IPv6 destination :: (no default route?)
loading libsume..
loading libsume..
loading libcam..
Traceback (most recent call last):
  File "./P4_SWITCH_CLI.py", line 36, in <module>
    import p4_regs_api, p4_tables_api
  File "/root/si317/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/sw/CLI/p4_tables_api.py", line 60, in <module>
    libcam=cdll.LoadLibrary(os.path.expandvars('$P4_PROJECT_DIR/sw/CLI/libcam.so'))
  File "/usr/lib/python2.7/ctypes/__init__.py", line 443, in LoadLibrary
    return self._dlltype(name)
  File "/usr/lib/python2.7/ctypes/__init__.py", line 365, in __init__
    self._handle = _dlopen(self._name, mode)
OSError: libsumereg.so: cannot open shared object file: No such file or directory

A: The issue here is that your LD_LIBRARY_PATH environment variable does not include the $SUME_SDNET/sw/sume directory. First run $ export LD_LIBRARY_PATH=${SUME_SDNET}/sw/sume:${LD_LIBRARY_PATH} then try to start the CLI tool again.

Question 2

How can I check if my design meets the timing requirements?

A: This is one of those details in FPGA design that is largely quoted as one of the most difficult problems to solve. There are lots of great online references that explain what it means to make a design "meet timing". Here is a great place to start. You can check if your design meets timing after you have run "place and route" or implementation. Generating the bitstream consists of running synthesis then implementation then bitstream generation. So after you've run $ make in $NF_DESIGN_DIR open up the Vivado generated timing report and check the timing results.

$ vi $NF_DESIGN_DIR/hw/project/simple_sume_switch.runs/impl_1/top_timing_summary_postroute_physopted.rpt

Search for the following timing summary:

------------------------------------------------------------------------------------------------
| Design Timing Summary
| ---------------------
------------------------------------------------------------------------------------------------

    WNS(ns)      TNS(ns)  TNS Failing Endpoints  TNS Total Endpoints      WHS(ns)      THS(ns)  THS Failing Endpoints  THS Total Endpoints     WPWS(ns)     TPWS(ns)  TPWS Failing Endpoints  TPWS Total Endpoints
    -------      -------  ---------------------  -------------------      -------      -------  ---------------------  -------------------     --------     --------  ----------------------  --------------------
      0.027        0.000                      0               725931        0.010        0.000                      0               725821        0.000        0.000                       0                370726


All user specified timing constraints are met.

Question 3

How do the NetFPGA interfaces relate to the sume_metadata.src_port and sume_metadata.dst_port fields?

A: Many new users are often confused about the interface names. The NetFPGA SUME board has 4 SFP+ ports (a.k.a physical interfaces). We often call these interfaces nf0, nf1, nf2, and nf3 where nf0 is the port closest to the link lights on the SUME board. There is one bit in the src_port and dst_port fields for each of these ports (bits 0, 2, 4, and 6).

If you type ifconfig on the linux host machine after programming the FPGA you should something like the output shown below. The nf0, nf1, nf2, and nf3 shown here mean something very different than what is explained above. These network interfaces are the means by which the host machine can communicate with the data-plane in the FPGA. There is also one bit for each of these interfaces in the src_port and dst_port fields (bits 1, 3, 5, and 7). So for example, if the data-plane wants to send a packet up to the host and have it arrive on the nf0 linux network interface then it must set bit 1 of the dst_port field (e.g. dst_port = 0b00000010).

$ ifconfig
.
.
.
nf0       Link encap:Ethernet  HWaddr 02:53:55:4d:45:00
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:5 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:300 (300.0 B)

nf1       Link encap:Ethernet  HWaddr 02:53:55:4d:45:01
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:5 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:300 (300.0 B)

nf2       Link encap:Ethernet  HWaddr 02:53:55:4d:45:02
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:5 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:300 (300.0 B)

nf3       Link encap:Ethernet  HWaddr 02:53:55:4d:45:03
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:5 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:300 (300.0 B)