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Making the boolean literals consistent in VHDL
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Piedone committed Jun 19, 2020
1 parent f35d024 commit 7a9851d
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion Hast.Core
Submodule Hast.Core updated 21 files
+2 −6 Hast.Remote.Worker.Daemon/Hast.Remote.Worker.Daemon.csproj
+4 −4 ...ificationTests/VerificationSources/CatapultSamplesVerificationTests.BasicSamplesMatchApproved.approved.vhdl
+3 −3 ...cationTests/VerificationSources/CatapultSamplesVerificationTests.FSharpSamplesMatchesApproved.approved.vhdl
+2 −2 ...ificationTests/VerificationSources/CatapultSamplesVerificationTests.KpzSamplesMatchesApproved.approved.vhdl
+10 −10 ...sts/VerificationSources/CatapultSamplesVerificationTests.Posit32AdvancedSampleMatchesApproved.approved.vhdl
+19 −19 ...nTests/VerificationSources/CatapultSamplesVerificationTests.Posit32FusedSampleMatchesApproved.approved.vhdl
+35 −35 ...cationTests/VerificationSources/CatapultSamplesVerificationTests.Posit32SampleMatchesApproved.approved.vhdl
+37 −37 ...VerificationSources/CatapultSamplesVerificationTests.Posit32SampleWithInliningMatchesApproved.approved.vhdl
+20 −20 ...ficationTests/VerificationSources/CatapultSamplesVerificationTests.PositSampleMatchesApproved.approved.vhdl
+31 −31 ...ificationTests/VerificationSources/CatapultSamplesVerificationTests.UnumSampleMatchesApproved.approved.vhdl
+2 −2 ...ationSources/StaticTestInputAssembliesVerificationTests.ClassStructureAssembliesMatchApproved.approved.vhdl
+4 −4 ...erificationTests/VerificationSources/XilinxSamplesVerificationTests.BasicSamplesMatchApproved.approved.vhdl
+3 −3 ...ficationTests/VerificationSources/XilinxSamplesVerificationTests.FSharpSamplesMatchesApproved.approved.vhdl
+2 −2 ...erificationTests/VerificationSources/XilinxSamplesVerificationTests.KpzSamplesMatchesApproved.approved.vhdl
+10 −10 ...Tests/VerificationSources/XilinxSamplesVerificationTests.Posit32AdvancedSampleMatchesApproved.approved.vhdl
+19 −19 ...ionTests/VerificationSources/XilinxSamplesVerificationTests.Posit32FusedSampleMatchesApproved.approved.vhdl
+35 −35 ...ficationTests/VerificationSources/XilinxSamplesVerificationTests.Posit32SampleMatchesApproved.approved.vhdl
+37 −37 ...s/VerificationSources/XilinxSamplesVerificationTests.Posit32SampleWithInliningMatchesApproved.approved.vhdl
+20 −20 ...rificationTests/VerificationSources/XilinxSamplesVerificationTests.PositSampleMatchesApproved.approved.vhdl
+31 −31 ...erificationTests/VerificationSources/XilinxSamplesVerificationTests.UnumSampleMatchesApproved.approved.vhdl
+6 −3 Hast.VhdlBuilder/Representation/Expression/Value.cs

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