Uart: Do not erase the receive register on overrun

LLeny · Oct 11, 2024 · 21c1be3 · 21c1be3
1 parent ea2b41b
commit 21c1be3
Showing 1 changed file with 7 additions and 6 deletions.
diff --git a/src/mikey/uart/mod.rs b/src/mikey/uart/mod.rs
@@ -76,10 +76,6 @@ impl Uart {
             return;    
         }
 
-        if let Some(to_send) = self.transmit_register.pop() {
-            self.set_redeye_pin(to_send);
-        }
-
         if self.transmit_register.is_empty() {
             if let Some(data) = self.transmit_holding_register.take() { 
                 trace!("[{}]Transmitting 0x{:02X}", self.rand, data);
@@ -91,6 +87,10 @@ impl Uart {
                 regs.serctl_r_enable_flag(SerCtlR::tx_empty);
             }
         }
+
+        if let Some(to_send) = self.transmit_register.pop() {
+            self.set_redeye_pin(to_send);
+        }
     }
 
     fn load_transmit_data(&mut self, mut data: u8, regs: &mut MikeyRegisters) {
@@ -169,10 +169,11 @@ impl Uart {
                 if self.receive_register.is_some() {
                     trace!("[{}]Overrun", self.rand);  
                     regs.serctl_r_enable_flag(SerCtlR::overrun);
+                } else {
+                    self.receive_register = Some(self.receive_register_buffer);
+                    regs.serctl_r_enable_flag(SerCtlR::rx_rdy);                                        
                 }
-                self.receive_register = Some(self.receive_register_buffer);
                 self.receive_register_len = 0;
-                regs.serctl_r_enable_flag(SerCtlR::rx_rdy);                                        
             }
             _ => (),
         }