Skip to content
This repository has been archived by the owner on May 28, 2024. It is now read-only.

Commit

Permalink
Update README.md
Browse files Browse the repository at this point in the history
  • Loading branch information
SinaKarvandi authored May 4, 2024
1 parent 9e9ef43 commit 6133be1
Showing 1 changed file with 13 additions and 0 deletions.
13 changes: 13 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,19 @@

**hwdbg** is a highly customizable debugger designed to ease hardware debugging by bringing software debugging concepts into the hardware debugging domain. **hwdbg** aims to help with the complexities associated with debugging hardware, including chips and IP cores. Key features of **hwdbg** include the ability to step through the hardware design at the clock-cycle level, visualize waveforms, inspect values (e.g., like a logical analyzer), and modify signals. Moreover, it is synthesizable into [FPGAs](https://github.com/HyperDbg/hwdbg-fpga) and has the potential for fabrication into physical chips.

```
┏━━━━━━━━━━━━━━━━━━━━━━━┓
_ _ _ ┃
| |_ _ _ _ _| || |_ ___ ┃
| . || | | |/ . || . \/ . | ┃
|_|_||__/_/ \___||___/\_. | ┃
<___' ┃
┃ ╱|、
HyperDbg's chip-level Debugger ┃ (˚ˎ 。7
┃ |、 ˜〵
┗━━━━━━━━━━━━━━━━━━━━━━━┛ じしˍ,)ノ
```

## Deployment Board

[This repository](https://github.com/HyperDbg/hwdbg-fpga) contains pre-built TCL files to facilitate project creation for running **hwdbg** on various FPGA development boards.
Expand Down

0 comments on commit 6133be1

Please sign in to comment.