Merge pull request ucb-bar#1575 from ucb-bar/bumpspike

Bump spike to latest
Humail-Nawaz · Aug 16, 2023 · c9ed050 · c9ed050
2 parents 1c80ddd + 1655b12
commit c9ed050
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/generators/chipyard/src/main/resources/csrc/cospike.cc b/generators/chipyard/src/main/resources/csrc/cospike.cc
@@ -79,9 +79,9 @@ std::set<reg_t> magic_addrs;
 cfg_t* cfg;
 std::vector<std::shared_ptr<read_override_device_t>> read_override_devices;
 
-static std::vector<std::pair<reg_t, mem_t*>> make_mems(const std::vector<mem_cfg_t> &layout)
+static std::vector<std::pair<reg_t, abstract_mem_t*>> make_mems(const std::vector<mem_cfg_t> &layout)
 {
-  std::vector<std::pair<reg_t, mem_t*>> mems;
+  std::vector<std::pair<reg_t, abstract_mem_t*>> mems;
   mems.reserve(layout.size());
   for (const auto &cfg : layout) {
     mems.push_back(std::make_pair(cfg.get_base(), new mem_t(cfg.get_size())));
@@ -147,7 +147,7 @@ extern "C" void cospike_cosim(long long int cycle,
                     0
                     );
 
-    std::vector<std::pair<reg_t, mem_t*>> mems = make_mems(cfg->mem_layout());
+    std::vector<std::pair<reg_t, abstract_mem_t*>> mems = make_mems(cfg->mem_layout());
 
     size_t default_boot_rom_size = 0x10000;
     size_t default_boot_rom_addr = 0x10000;

diff --git a/toolchains/riscv-tools/riscv-isa-sim b/toolchains/riscv-tools/riscv-isa-sim
+4 −3		ci-tests/testlib.c
+6 −0		disasm/isa_parser.cc
+120 −6		riscv/csrs.cc
+59 −4		riscv/csrs.h
+14 −5		riscv/devices.h
+1 −1		riscv/dts.cc
+1 −1		riscv/dts.h
+78 −25		riscv/encoding.h
+3 −1		riscv/execute.cc
+3 −0		riscv/isa_parser.h
+5 −5		riscv/mmu.cc
+13 −5		riscv/mmu.h
+68 −5		riscv/processor.cc
+2 −0		riscv/processor.h
+2 −2		riscv/sim.cc
+2 −2		riscv/sim.h
+1 −1		riscv/triggers.cc
+5 −4		spike_main/spike.cc