forked from BetzDrive/bldc-controller-hardware
-
Notifications
You must be signed in to change notification settings - Fork 0
/
BLDC.pro
374 lines (373 loc) · 6.8 KB
/
BLDC.pro
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
update=Mon 20 Jul 2020 07:50:20 PM PDT
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_WriteFile=0
ERC_TestSimilarLabels=1
ERC_CheckUniqueGlobalLabels=1
ERC_CheckBusDriverConflicts=1
ERC_CheckBusEntryConflicts=1
ERC_CheckBusToBusConflicts=1
ERC_CheckBusToNetConflicts=1
[SchematicFrame]
version=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=BLDC3.net
LastSTEPExportPath=BLDC.step
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
MinClearance=0
MinTrackWidth=0.1778
MinViaAnnulus=0.05
MinViaDiameter=0.7
MinThroughDrill=0.254
MinMicroViaDiameter=0
MinMicroViaDrill=0
MinHoleToHole=0.25
Unconnected_items=error
Track_too_close_to_hole=error
Track_too_close_to_pad=error
Track_too_close_to_via=error
Track_too_close_to_copper_area=error
Track_too_close_to_copper_item=error
Vias_too_close=error
Via_too_close_to_track=error
Via_too_close_to_copper_item=error
Track_ends_too_close=error
Parallel_tracks_too_close=error
Tracks_crossing=error
Track_too_close_to_board_edge=error
Via_too_close_to_board_edge=error
Pad_too_close_to_board_edge=error
Pads_too_close=error
Pad_too_close_to_copper_item=error
Copper_areas_intersect=error
Copper_areas_too_close=error
Copper_zone_net_has_no_pads=error
Via_is_not_connected=warning
Track_has_unconnected_end=warning
Hole_too_close_to_pad=error
Hole_too_close_to_track=error
Drilled_holes_too_close_together=error
Track_width_too_small=error
Track_width_too_large=error
Via_size_too_small=error
Via_annulus_too_small=error
Via_drill_too_small=error
Pad_drill_too_small=error
Via_hole_larger_than_diameter=error
Micro_via_not_allowed=error
Micro_via_through_too_many_layers=error
Micro_via_size_too_small=error
Micro_via_drill_too_small=error
Buried_via_not_allowed=error
NetClass_Track_Width_too_small=error
NetClass_Clearance_too_small=error
NetClass_via_annulus_too_small=error
NetClass_Via_Dia_too_small=error
NetClass_Via_Drill_too_small=error
NetClass_uVia_Dia_too_small=error
NetClass_uVia_Drill_too_small=error
Via_inside_keepout_area=error
Micro_via_inside_keepout_area=error
Buried_via_inside_keepout_area=error
Track_inside_keepout_area=error
Pad_inside_keepout_area=error
Footprint_inside_keepout_area=error
Hole_inside_keepout_area=error
Text_inside_keepout_area=error
Graphic_inside_keepout_area=error
Courtyards_overlap=error
Footprint_has_no_courtyard_defined=ignore
Footprint_has_malformed_courtyard=error
PTH_inside_courtyard=ignore
NPTH_inside_courtyard=ignore
Item_on_a_disabled_layer=error
Board_has_malformed_outline=error
Missing_footprint=warning
Duplicate_footprints=warning
Extra_footprint=warning
Unresolved_text_variable=error
CopperEdgeClearance=0.01
TrackWidth1=0.1778
TrackWidth2=0.1778
TrackWidth3=0.1778
TrackWidth4=0.25
TrackWidth5=0.3
TrackWidth6=0.5
ViaDiameter1=0.74
ViaDrill1=0.38
ViaDiameter2=0.7367
ViaDrill2=0.381
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=0.5
SilkTextSizeH=0.5
SilkTextSizeThickness=0.05
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
FabLineWidth=0.09999999999999999
FabTextSizeV=1
FabTextSizeH=1
FabTextSizeThickness=0.15
FabTextItalic=0
FabTextUpright=0
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
DimensionUnits=0
DimensionPrecision=1
SolderMaskClearance=0.09999999999999999
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1778
TrackWidth=0.1778
ViaDiameter=0.74
ViaDrill=0.38
uViaDiameter=0.01
uViaDrill=0
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=3v3Power
Clearance=0.1778
TrackWidth=0.1778
ViaDiameter=0.74
ViaDrill=0.38
uViaDiameter=0.01
uViaDrill=0
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=48vPower
Clearance=0.1524
TrackWidth=1.2
ViaDiameter=1
ViaDrill=0.38
uViaDiameter=0.01
uViaDrill=0
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=Test Points
Clearance=0.1778
TrackWidth=0.1778
ViaDiameter=2
ViaDrill=0.38
uViaDiameter=0.01
uViaDrill=0
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[sheetnames]
1=b102f2a6-c08a-4b46-a4f7-96536ed36942: