Thistle Memory Layout

Address	Size	Description
$0000-$0FFF	$1000	Memory Bank 0 (Zero Page+Stack)
$1000-$1FFF	$1000	Memory Bank 1
$2000-$2FFF	$1000	Memory Bank 2
$3000-$3FFF	$1000	Memory Bank 3
$4000-$4FFF	$1000	Memory Bank 4
$5000-$5FFF	$1000	Memory Bank 5
$6000-$6FFF	$1000	Memory Bank 6
$7000-$7FFF	$1000	Memory Bank 7
$8000-$8FFF	$1000	Memory Bank 8
$9000-$9FFF	$1000	Memory Bank 9
$A000-$AFFF	$1000	Component Access 48-63 (Bank 10)
$B000-$BFFF	$1000	Component Access 32-47 (Bank 11)
$C000-$CFFF	$1000	Component Access 16-31 (Bank 12)
$D000-$DFFF	$1000	Component Access 0-15 (Bank 13)
$E000-$E00F	$0010	General IO
$E010-$E01F	$0010	Component Mapper
$E020-$E03F	$0020	Bank Selector
$E040-$E04F	$0010	DMA Copy Engine
$E050-$E05F	$0010	RTC and Timers
($E060-$E0FF)	$00A0	Reserved
$E100-$E11F	$0020	Computer Information
($E120-$EEFF)	$0DE0	Reserved
$EF00-$EFFF	$0100	EEPROM Data Access
$F000-$FFFF	$1000	EEPROM Code Access

Memory is laid out as 16 4KiB banks, of which areas that share usage with memory can be toggled between the device or memory (Except for Bank 14).
The Bank Selector region consists of 16 unsigned 16bit numbers that control what portion of physical memory is available in each bank. The default layout is a linear mapping of the bottom of physical memory. A byte in the Component Mapper controls whether Memory or Devices is visible for the shared regions.
Components are layed out as 64 256B regions, which are mapped in an out by the Component Mapper device.
Component Access areas 16-63 are by default hidden, the EEPROM is by default visible.

Refer to each Device's respective page for more information.