From ea1a0a6950268e0437c75e21abcb892b9462c9fa Mon Sep 17 00:00:00 2001 From: Jiafei Pan Date: Fri, 21 Jun 2024 17:30:01 +0800 Subject: [PATCH] board: imx93_evk: enable ENET support for Cortex-A Core Add ENET 1G support on Cortex-A Core, enable it in DTS. Updated board document for supported features. Signed-off-by: Jiafei Pan --- boards/nxp/imx93_evk/Kconfig.defconfig | 44 +++++++++++++++++++ boards/nxp/imx93_evk/doc/index.rst | 14 +++++- boards/nxp/imx93_evk/imx93_evk-pinctrl.dtsi | 39 +++++++++++++++- .../nxp/imx93_evk/imx93_evk_mimx9352_a55.dts | 24 ++++++++++ dts/arm64/nxp/nxp_mimx93_a55.dtsi | 32 +++++++++++++- soc/nxp/imx/imx9/Kconfig | 1 + 6 files changed, 150 insertions(+), 4 deletions(-) create mode 100644 boards/nxp/imx93_evk/Kconfig.defconfig diff --git a/boards/nxp/imx93_evk/Kconfig.defconfig b/boards/nxp/imx93_evk/Kconfig.defconfig new file mode 100644 index 00000000000000..560c0534e0c942 --- /dev/null +++ b/boards/nxp/imx93_evk/Kconfig.defconfig @@ -0,0 +1,44 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_IMX93_EVK + +if BOARD_IMX93_EVK_MIMX9352_A55 + +if NETWORKING + +config NET_L2_ETHERNET + default y + +config NET_TX_STACK_SIZE + default 8192 + +config NET_RX_STACK_SIZE + default 8192 + +if NET_TCP + +config NET_TCP_WORKQ_STACK_SIZE + default 8192 + +endif # NET_TCP + +if NET_MGMT_EVENT + +config NET_MGMT_EVENT_STACK_SIZE + default 8192 + +endif # NET_MGMT_EVENT + +if NET_SOCKETS_SERVICE + +config NET_SOCKETS_SERVICE_STACK_SIZE + default 8192 + +endif # NET_SOCKETS_SERVICE + +endif # NETWORKING + +endif # BOARD_IMX93_EVK_MIMX9352_A55 + +endif # BOARD_IMX93_EVK diff --git a/boards/nxp/imx93_evk/doc/index.rst b/boards/nxp/imx93_evk/doc/index.rst index 0fdeb237ec27c7..dd088694d2e517 100644 --- a/boards/nxp/imx93_evk/doc/index.rst +++ b/boards/nxp/imx93_evk/doc/index.rst @@ -48,8 +48,8 @@ Cortex®-M33 core. Zephyr OS is ported to run on one of the Cortex®-A55 core. Supported Features ================== -The Zephyr mimx93_evk board configuration supports the following hardware -features: +The Zephyr mimx93_evk board Cortex-A Core configuration supports the following +hardware features: +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | @@ -58,8 +58,18 @@ features: +-----------+------------+-------------------------------------+ | ARM TIMER | on-chip | system clock | +-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ | UART | on-chip | serial port | +-----------+------------+-------------------------------------+ +| GPIO | on-chip | GPIO | ++-----------+------------+-------------------------------------+ +| TPM | on-chip | TPM Counter | ++-----------+------------+-------------------------------------+ +| ENET | on-chip | ethernet port | ++-----------+------------+-------------------------------------+ Devices ======== diff --git a/boards/nxp/imx93_evk/imx93_evk-pinctrl.dtsi b/boards/nxp/imx93_evk/imx93_evk-pinctrl.dtsi index 31e35907f86d6a..5399bf596fef28 100644 --- a/boards/nxp/imx93_evk/imx93_evk-pinctrl.dtsi +++ b/boards/nxp/imx93_evk/imx93_evk-pinctrl.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, NXP + * Copyright 2022,2024 NXP * SPDX-License-Identifier: Apache-2.0 * */ @@ -83,4 +83,41 @@ }; }; + pinmux_mdio: pinmux_mdio { + group0 { + pinmux = <&iomuxc1_enet2_mdc_enet_mdc_enet1_mdc>, + <&iomuxc1_enet2_mdio_enet_mdio_enet1_mdio>; + bias-pull-down; + slew-rate = "slightly_fast"; + drive-strength = "x6"; + }; + }; + + pinmux_enet: pinmux_enet { + group0 { + pinmux = <&iomuxc1_enet2_rd0_enet_rgmii_rd_enet1_rgmii_rd0>, + <&iomuxc1_enet2_rd1_enet_rgmii_rd_enet1_rgmii_rd1>, + <&iomuxc1_enet2_rd2_enet_rgmii_rd_enet1_rgmii_rd2>, + <&iomuxc1_enet2_rd3_enet_rgmii_rd_enet1_rgmii_rd3>, + <&iomuxc1_enet2_rx_ctl_enet_rgmii_rx_ctl_enet1_rgmii_rx_ctl>, + <&iomuxc1_enet2_td0_enet_rgmii_td_enet1_rgmii_td0>, + <&iomuxc1_enet2_td1_enet_rgmii_td_enet1_rgmii_td1>, + <&iomuxc1_enet2_td2_enet_rgmii_td_enet1_rgmii_td2>, + <&iomuxc1_enet2_td3_enet_rgmii_td_enet1_rgmii_td3>, + <&iomuxc1_enet2_tx_ctl_enet_rgmii_tx_ctl_enet1_rgmii_tx_ctl>; + bias-pull-down; + slew-rate = "slightly_fast"; + drive-strength = "x6"; + }; + + group1 { + pinmux = <&iomuxc1_enet2_rxc_enet_rgmii_rxc_enet1_rgmii_rxc>, + <&iomuxc1_enet2_txc_enet_rgmii_txc_enet1_rgmii_txc>; + bias-pull-down; + slew-rate = "fast"; + drive-strength = "x6"; + }; + + }; + }; diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts b/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts index cd025a547e717f..99d1628842fc92 100644 --- a/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts @@ -66,6 +66,30 @@ }; }; +&enet { + status = "okay"; +}; + +&enet_mac { + pinctrl-0 = <&pinmux_enet>; + pinctrl-names = "default"; + phy-handle = <&phy>; + zephyr,random-mac-address; + phy-connection-type = "rgmii"; + status = "okay"; +}; + +&enet_mdio { + pinctrl-0 = <&pinmux_mdio>; + pinctrl-names = "default"; + status = "okay"; + phy: phy@0 { + compatible = "realtek,rtl8211f"; + reg = <2>; + status = "okay"; + }; +}; + &lpuart1 { status = "disabled"; current-speed = <115200>; diff --git a/dts/arm64/nxp/nxp_mimx93_a55.dtsi b/dts/arm64/nxp/nxp_mimx93_a55.dtsi index defcb2dc32687c..59978833bdb81d 100644 --- a/dts/arm64/nxp/nxp_mimx93_a55.dtsi +++ b/dts/arm64/nxp/nxp_mimx93_a55.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2022 NXP + * Copyright 2022,2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -348,6 +348,36 @@ status = "disabled"; }; + enet: enet@42890000 { + compatible = "nxp,enet1g"; + reg = <0x42890000 DT_SIZE_K(64)>; + clocks = <&ccm IMX_CCM_ENET_CLK 0 0>; + status = "disabled"; + + enet_mac: ethernet { + compatible = "nxp,enet-mac"; + interrupts = ; + interrupt-names = "COMMON"; + interrupt-parent = <&gic>; + nxp,mdio = <&enet_mdio>; + nxp,ptp-clock = <&enet_ptp_clock>; + status = "disabled"; + }; + enet_mdio: mdio { + compatible = "nxp,enet-mdio"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + enet_ptp_clock: ptp_clock { + compatible = "nxp,enet-ptp-clock"; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&ccm IMX_CCM_ENET_PLL 0 0>; + status = "disabled"; + }; + }; + tpm1: tpm@44310000 { compatible = "nxp,tpm-timer"; reg = <0x44310000 DT_SIZE_K(64)>; diff --git a/soc/nxp/imx/imx9/Kconfig b/soc/nxp/imx/imx9/Kconfig index 5ea7bed765329e..a8e51c4ee7d291 100644 --- a/soc/nxp/imx/imx9/Kconfig +++ b/soc/nxp/imx/imx9/Kconfig @@ -8,6 +8,7 @@ config SOC_MIMX9352_A55 select HAS_MCUX if CLOCK_CONTROL select HAS_MCUX_CCM_REV2 if CLOCK_CONTROL select HAS_MCUX_IOMUXC if PINCTRL + select HAS_MCUX_CACHE config MCUX_CORE_SUFFIX default "_ca55" if SOC_MIMX9352_A55